On 11/22/2013 10:37 PM, Vlad Yasevich wrote: > On 11/22/2013 04:47 AM, Jason Wang wrote: >> > On 11/22/2013 04:04 AM, Vlad Yasevich wrote: >>> >> e1000 provides a E1000_RAH_AV bit on every complete write >>> >> to the Receive Address Register. We can use this bit >>> >> 2 ways: >>> >> 1) To trigger HMP notifications. When the bit is set the >>> >> mac address is fully set and we can update the HMP. >>> >> >>> >> 2) We can turn off he bit on the write to low order bits of >>> >> the Receive Address Register, so that we would not try >>> >> to match received traffic to this address when it is >>> >> not completely set. >>> >> >>> >> Signed-off-by: Vlad Yasevich <vyase...@redhat.com> >>> >> --- >>> >> hw/net/e1000.c | 11 ++++++++++- >>> >> 1 file changed, 10 insertions(+), 1 deletion(-) >>> >> >>> >> diff --git a/hw/net/e1000.c b/hw/net/e1000.c >>> >> index ae63591..82978ea 100644 >>> >> --- a/hw/net/e1000.c >>> >> +++ b/hw/net/e1000.c >>> >> @@ -1106,10 +1106,19 @@ mac_writereg(E1000State *s, int index, uint32_t >>> >> val) >>> >> >>> >> s->mac_reg[index] = val; >>> >> >>> >> - if (index == RA || index == RA + 1) { >>> >> + switch (index) { >>> >> + case RA: >>> >> + /* Mask off AV bit on the write of the low dword. The write of >>> >> + * the high dword will set the bit. This way a half-written >>> >> + * mac address will not be used to filter on rx. >>> >> + */ >>> >> + s->mac_reg[RA+1] &= ~E1000_RAH_AV; >> > >> > If a stupid driver write high dword first, it won't receive any packets. > I need to ping Intel guys again. I asked them what happens when only > the low register is set, but haven't heard back. >
They probably don't have the willing to share the internals of card. I hacked the e1000 driver to check the subtle and undocumented behaviour in the past. Maybe we can do the same.