Il 26/11/2013 16:35, Avi Kivity ha scritto: >>>> If we want to ensure, we need to use a different mechanism for >>>> synchronization than the global RCU. QRCU would work; readers are not >>>> wait-free but only if there is a concurrent synchronize_qrcu, which >>>> should be rare. >>> An alternative path is to convince ourselves that the hardware does not >>> provide the guarantees that the current code provides, and so we can >>> relax them. >> No, I think it's a reasonable guarantee to provide. > > Why?
Because IIUC the semantics may depend not just on the interrupt controller, but also on the specific PCI device. It seems safer to assume that at least one device/driver pair wants this to work. (BTW, PCI memory writes are posted, but configuration writes are not). Paolo
