We base it on the OS endian, as reflected by the endianness of the interrupt vectors (handled through the ILE bit in the LPCR register).
This patch does two things: - make LPCR a KVM register - implement virtio_get_byteswap() over LPCR Using first_cpu to fetch the registers from KVM may look arbitrary and awkward, but it is okay because KVM sets/unsets the ILE bit on all CPUs. Changes in v2: - call cpu_synchronize_state() instead of kvm_arch_get_registers(). Suggested-by: Benjamin Herrenschmidt <b...@kernel.crashing.org> Signed-off-by: Rusty Russell <ru...@rustcorp.com.au> Signed-off-by: Greg Kurz <gk...@linux.vnet.ibm.com> --- Alex, If you are interested, I can resend the whole virtio+endian serie or setup a git tree for you to pull from. -- Greg target-ppc/kvm.c | 4 ++++ target-ppc/misc_helper.c | 12 ++++++++++++ 2 files changed, 16 insertions(+) diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c index 10d0cd9..b450a22 100644 --- a/target-ppc/kvm.c +++ b/target-ppc/kvm.c @@ -869,6 +869,8 @@ int kvm_arch_put_registers(CPUState *cs, int level) DPRINTF("Warning: Unable to set VPA information to KVM\n"); } } + + kvm_put_one_spr(cs, KVM_REG_PPC_LPCR, SPR_LPCR); #endif /* TARGET_PPC64 */ } @@ -1091,6 +1093,8 @@ int kvm_arch_get_registers(CPUState *cs) DPRINTF("Warning: Unable to get VPA information from KVM\n"); } } + + kvm_get_one_spr(cs, KVM_REG_PPC_LPCR, SPR_LPCR); #endif } diff --git a/target-ppc/misc_helper.c b/target-ppc/misc_helper.c index 616aab6..e8fc8a3 100644 --- a/target-ppc/misc_helper.c +++ b/target-ppc/misc_helper.c @@ -20,6 +20,8 @@ #include "helper.h" #include "helper_regs.h" +#include "hw/virtio/virtio.h" +#include "sysemu/kvm.h" /*****************************************************************************/ /* SPR accesses */ @@ -116,3 +118,13 @@ void ppc_store_msr(CPUPPCState *env, target_ulong value) { hreg_store_msr(env, value, 0); } + +bool virtio_get_byteswap(void) +{ + PowerPCCPU *cp = POWERPC_CPU(first_cpu); + CPUPPCState *env = &cp->env; + + cpu_synchronize_state(first_cpu); + + return env->spr[SPR_LPCR] & LPCR_ILE; +}