The QEMU emulation models for Power7 and Power8 are still missing some of the base instructions that were introduced in Power ISA 2.06 and even a few that were introduced prior to that.
This patch series gets these models caught up with respect to the base 2.06 ISA. That is, the Book I and Book II instructions for the branch, fixed point and floating point units will be completed with this series. Decimal floating point is not addressed in this series, nor are the base ISA 2.07 changes for the Power8 model. In some cases, existing instructions are re-implemented using common macros, thus eliminating some redundant code. The patch series eliminates almost half as much code as it adds. Additionally, some bugs in the common floating point library (softfloat) are fixed. V2: Addressing comments from Richard Henderson. Fixed corner case bug in divweu. V3: Addressing comments from Peter Maydell. softloat changes have been moved back to the VSX stage 3 patch series. Tom Musta (14): target-ppc: Add Flag for Power ISA V2.06 target-ppc: Add ISA2.06 bpermd Instruction target-ppc: Add ISA2.06 divdeu[o] Instructions target-ppc: Add ISA2.06 divde[o] Instructions target-ppc: Add ISA 2.06 divwe[u][o] Instructions target-ppc: Add ISA2.06 lbarx, lharx Instructions target-ppc: Add ISA 2.06 stbcx. and sthcx. Instructions target-ppc: Add ISA2.06 Float to Integer Instructions target-ppc: Add ISA 2.06 fcfid[u][s] Instructions target-ppc: Fix and enable fri[mnpz] target-ppc: Add ISA 2.06 ftdiv Instruction target-ppc: Add ISA 2.06 ftsqrt target-ppc: Enable frsqrtes on Power7 and Power8 target-ppc: Add ISA2.06 lfiwzx Instruction include/qemu/host-utils.h | 28 ++++ target-ppc/cpu.h | 4 +- target-ppc/fpu_helper.c | 248 +++++++++++++++++++---------------- target-ppc/helper.h | 13 ++ target-ppc/int_helper.c | 70 ++++++++++ target-ppc/translate.c | 309 +++++++++++++++++++++++++++++++++---------- target-ppc/translate_init.c | 10 +- util/host-utils.c | 75 +++++++++++ 8 files changed, 568 insertions(+), 189 deletions(-)
