This patch adds a flag for the Divide Extended instructions that
were introduced in Power ISA V2.06B. The flag is added to the
Power7 and Power8 models.
Signed-off-by: Tom Musta <tommu...@gmail.com>
---
V4: Split into new and separate patch. Added flag to Power7+
model.
target-ppc/cpu.h | 5 ++++-
target-ppc/translate_init.c | 6 +++---
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 0b330fd..8ba0d32 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1879,9 +1879,12 @@ enum {
PPC2_VSX207 = 0x0000000000000040ULL,
/* ISA 2.06B bpermd */
PPC2_PERM_ISA206 = 0x0000000000000080ULL,
+ /* ISA 2.06B divide extended variants */
+ PPC2_DIVE_ISA206 = 0x0000000000000100ULL,
#define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \
- PPC2_ISA205 | PPC2_VSX207 | PPC2_PERM_ISA206)
+ PPC2_ISA205 | PPC2_VSX207 | PPC2_PERM_ISA206 | \
+ PPC2_DIVE_ISA206)
};
/*****************************************************************************/
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 823e40d..390024e 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7237,7 +7237,7 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
PPC_SEGMENT_64B | PPC_SLBI |
PPC_POPCNTB | PPC_POPCNTWD;
pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX | PPC2_ISA205 |
- PPC2_PERM_ISA206;
+ PPC2_PERM_ISA206 | PPC2_DIVE_ISA206;
pcc->msr_mask = 0x800000000284FF37ULL;
pcc->mmu_model = POWERPC_MMU_2_06;
#if defined(CONFIG_SOFTMMU)
@@ -7276,7 +7276,7 @@ POWERPC_FAMILY(POWER7P)(ObjectClass *oc, void *data)
PPC_SEGMENT_64B | PPC_SLBI |
PPC_POPCNTB | PPC_POPCNTWD;
pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX | PPC2_ISA205 |
- PPC2_PERM_ISA206;
+ PPC2_PERM_ISA206 | PPC2_DIVE_ISA206;
pcc->msr_mask = 0x800000000204FF37ULL;
pcc->mmu_model = POWERPC_MMU_2_06;
#if defined(CONFIG_SOFTMMU)
@@ -7315,7 +7315,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
PPC_SEGMENT_64B | PPC_SLBI |
PPC_POPCNTB | PPC_POPCNTWD;
pcc->insns_flags2 = PPC2_VSX | PPC2_VSX207 | PPC2_DFP | PPC2_DBRX |
- PPC2_PERM_ISA206;
+ PPC2_PERM_ISA206 | PPC2_DIVE_ISA206;
pcc->msr_mask = 0x800000000284FF36ULL;
pcc->mmu_model = POWERPC_MMU_2_06;
#if defined(CONFIG_SOFTMMU)
--
1.7.1
