On Mon, Jan 20, 2014 at 01:58:45PM +0100, Gerd Hoffmann wrote: > On Mo, 2014-01-20 at 13:23 +0200, Michael S. Tsirkin wrote: > > On Tue, Dec 17, 2013 at 06:56:06PM +0100, Gerd Hoffmann wrote: > > > > I merged your patch but split it: q35 is separate and piix > > > > is separate. Would you like me to drop the q35 part then? > > > > > > If you are fine with q35 having only 2G lowmem keep it. It's safe. > > > > > > We can sort the mmconfig setup afterwards, then check if (and how) we'll > > > transition to 3G lowmem. Maybe we simply don't after all, with the > > > world moving to 64bit it doesn't matter that much whenever memory is > > > mapped above or below 4g. And for old 32bit guests there is always the > > > option to stick with piix which continues to offers up to 3.5G lowmem. > > > > > > cheers, > > > Gerd > > > > > > > Any update here? > > No time to investigate yet, still playing catch-up after xmas holidays & > being sick. > > > I'm worried 2G lowmem is a bit too aggressive, PAE still exists. > > piix (with up to 3.5g lowmem) exists too ;)
Yes but I think it's preferable to keep features orthogonal. > > If we want to support old bios, one way would be to add > > a new register to enable 3g lowmem. > > Do we really want do this (allow guest change RAM mapping)? > > I think we should: > (1) reserve mmconf xbar as motherboard ressource, so it can live within > PCI0._CRS I don't think this is possible, PCI FW spec seems to outlaw this explicitly. > (2) make PCI0._CRS start at end of lowmem, like it does on piix This we can do. But we'll have to make a hole for the xbar. > Then maybe: > (3) update seabios to place xbar somewhere else > (4) adjust memory layout. > > (1)+(2) are useful anyway. (3)+(4) would allow for 3g lowmem, and > obviously have some compatibility issues: doing (4) requires a seabios > update. > > cheers, > Gerd Right. So you'll look into 4 then? I'm keeping these patches out of tree for now ...