On 26 February 2014 03:32, Hu Tao <hu...@cn.fujitsu.com> wrote:
> On Wed, Feb 26, 2014 at 10:49:59AM +0800, Hu Tao wrote:
>> On Sat, Feb 15, 2014 at 04:07:24PM +0000, Peter Maydell wrote:
>> > From: Rob Herring <rob.herr...@linaro.org>
>> > /* Determine whether this address is in the region controlled by
>> > * TTBR0 or TTBR1 (or if it is in neither region and should fault).
>> > * This is a Non-secure PL0/1 stage 1 translation, so controlled by
>> > * TTBCR/TTBR0/TTBR1 in accordance with ARM ARM DDI0406C table B-32:
>> > */
>> > - uint32_t t0sz = extract32(env->cp15.c2_control, 0, 3);
>> > - uint32_t t1sz = extract32(env->cp15.c2_control, 16, 3);
>> > - if (t0sz && !extract32(address, 32 - t0sz, t0sz)) {
>> > + uint32_t t0sz = extract32(env->cp15.c2_control, 0, 5);
>> > + uint32_t t1sz = extract32(env->cp15.c2_control, 16, 5);
>>
>> t0sz is bit [5:0], so shouldn't we extract 6 bits here? same for t1sz.
Yes.
>> > + if (t0sz && !extract64(address, va_size - t0sz, t0sz)) {
>> > /* there is a ttbr0 region and we are in it (high bits all zero)
>> > */
>> > ttbr_select = 0;
>> > - } else if (t1sz && !extract32(~address, 32 - t1sz, t1sz)) {
>> > + } else if (t1sz && !extract64(~address, va_size - t1sz, t1sz)) {
>> > /* there is a ttbr1 region and we are in it (high bits all one) */
>> > ttbr_select = 1;
>> > } else if (!t0sz) {
>>
>> Can't be true for Aarch64. the VA address space has a maximum address width
>> of 48 bits(page D5-1712 of ARM DDI 0487A.a), that means t0sz and t1sz should
>> have a minimum value of 16.
>
> It doesn't matter here. Maybe we should check the value when writing to
> TCR_EL1. What's the behaviour when writing an invalid tsz to TCR_EL1?
I haven't checked through all the details, but it looks like the answer is
you can write anything, and the pseudocode for AArch64.TranslationTableWalk
specifies what happens if the tsz is outside the expected range (we
clamp tablesize to be 25 <= tablesize <= 48).
I'm not sure we've correctly implemented the handling specified under
the AddrTop() pseudocode function either.
thanks
-- PMM
