On Mon, Dec 21, 2009 at 11:50 PM, Richard Henderson <r...@twiddle.net> wrote:
[...]
>> Even if movcond was quick to generate
>> host code, for instance for ARM, you'd have to explicitly detect
>> conditional moves
>
> One of us is confused. Why would I have to explicitly detect conditional
> moves?
Most ARM instructions are conditional, with condition code being the
top 4 bits of the instruction. So the front-end does it the simplest
way possible:
if (cond != 0xe) {
/* if not always execute, we generate a conditional jump to
next instruction */
s->condlabel = gen_new_label();
gen_test_cc(cond ^ 1, s->condlabel);
s->condjmp = 1;
}
and then generates the code for the instruction as if it wasn't
conditional. If you wanted to use movcond, you'd have to make
cond + move a special case, which would add some cost to
all conditional instructions. OTOH that cost could be amortized
by generating less TCG ops for that instruction, and by a
potentially faster generated code. But if this isn't measured I
won't bet which one is faster, I have been wrong too often.
Laurent
