On Sun, Mar 9, 2014 at 4:10 PM, Peter Maydell <peter.mayd...@linaro.org> wrote:
> From: Alex Bennée <alex.ben...@linaro.org>
>
> rn == 31 always means SP (not XZR) whether an add_sub_ext
> instruction is setting the flags or not; only rd has behaviour
> dependent on whether we are setting flags.
>
> Reported-by: Laurent Desnogues <laurent.desnog...@gmail.com>
> Signed-off-by: Alex Bennée <alex.ben...@linaro.org>
> Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Laurent Desnogues <laurent.desnog...@gmail.com>
Thanks,
Laurent
> ---
> target-arm/translate-a64.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
> index f89b0a5..90936cd 100644
> --- a/target-arm/translate-a64.c
> +++ b/target-arm/translate-a64.c
> @@ -3096,12 +3096,11 @@ static void disas_add_sub_ext_reg(DisasContext *s,
> uint32_t insn)
>
> /* non-flag setting ops may use SP */
> if (!setflags) {
> - tcg_rn = read_cpu_reg_sp(s, rn, sf);
> tcg_rd = cpu_reg_sp(s, rd);
> } else {
> - tcg_rn = read_cpu_reg(s, rn, sf);
> tcg_rd = cpu_reg(s, rd);
> }
> + tcg_rn = read_cpu_reg_sp(s, rn, sf);
>
> tcg_rm = read_cpu_reg(s, rm, sf);
> ext_and_shift_reg(tcg_rm, tcg_rm, option, imm3);
> --
> 1.9.0
>
