The following series deals with tick timers for sparc64. It is not complete solution yet, comments are welcome.
First two changes are really debug helpers, so are not strictly required. Central part is addressing how traps are taken, which includes taking trap when PSTATE.IE is changed, PIL mask is changed, and SOFTINT is written to. I did not used CPU_INTERRUPT_TIMER at all, instead all interrupts are delivered with CPU_INTERRUPT_HARD. Last change is reimplementing tick timers without periodic timer framework. sparc64 timers are essentially one-shot since they provide trap on tick counter match only so require reloading for next time period. Still it may be cleaner to fix sun4u use of periodic timers. These changes allow recent linux kernel to start scheduler works, and count about 200 bogomips before crashing later. --- Igor V. Kovalenko (9): sparc64: trace pstate and global register set changes sparc64: add PSR and PIL to cpu state dump sparc64: use helper_wrpil to check pending irq on write sparc64: check for pending irq when pil, pstate or softint is changed sparc64: add macros to deal with softint and timer interrupt sparc64: clear exception_index with -1 value sparc64: move cpu_interrupts_enabled to cpu.h sparc64: interrupt trap handling sparc64: reimplement tick timers cpu-exec.c | 40 ++++---- hw/sun4u.c | 234 +++++++++++++++++++++++++++++++++++++--------- target-sparc/cpu.h | 19 ++++ target-sparc/exec.h | 13 --- target-sparc/helper.c | 1 target-sparc/helper.h | 1 target-sparc/op_helper.c | 75 ++++++++++++++- target-sparc/translate.c | 5 - 8 files changed, 304 insertions(+), 84 deletions(-) -- Kind regards, Igor V. Kovalenko