Add emulation of the PowerPC Convert to DFP Long (dctdp[.]) and
Convert to DFP Extended (dctqpq[.]) instructions.
Signed-off-by: Tom Musta <tommu...@gmail.com>
---
target-ppc/dfp_helper.c | 35 +++++++++++++++++++++++++++++++++++
target-ppc/helper.h | 2 ++
target-ppc/translate.c | 4 ++++
3 files changed, 41 insertions(+), 0 deletions(-)
diff --git a/target-ppc/dfp_helper.c b/target-ppc/dfp_helper.c
index 5c60492..a719797 100644
--- a/target-ppc/dfp_helper.c
+++ b/target-ppc/dfp_helper.c
@@ -286,6 +286,15 @@ static void dfp_check_for_VXSNAN(struct PPC_DFP *dfp)
}
}
+static void dfp_check_for_VXSNAN_and_convert_to_QNaN(struct PPC_DFP *dfp)
+{
+ if (decNumberIsSNaN(&dfp->t)) {
+ dfp->t.bits &= ~DECSNAN;
+ dfp->t.bits |= DECNAN;
+ dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXSNAN, FP_VE);
+ }
+}
+
static void dfp_check_for_VXISI(struct PPC_DFP *dfp, int testForSameSign)
{
if (dfp->context.status & DEC_Invalid_operation) {
@@ -845,3 +854,29 @@ PPC_DFP_PostProc RINTN_PPs[] = {
DFP_HELPER_RINT(drintn, RINTN_PPs, 64)
DFP_HELPER_RINT(drintnq, RINTN_PPs, 128)
+
+void helper_dctdp(CPUPPCState *env, uint64_t *t, uint64_t *b)
+{
+ struct PPC_DFP dfp;
+ uint32_t b_short = *b;
+ dfp_prepare_decimal64(&dfp, 0, 0, env);
+ decimal32ToNumber((decimal32 *)&b_short, &dfp.t);
+ decimal64FromNumber((decimal64 *)t, &dfp.t, &dfp.context);
+ dfp_set_FPRF_from_FRT(&dfp);
+}
+
+PPC_DFP_PostProc CTQPQ_PPs[] = {
+ dfp_check_for_VXSNAN_and_convert_to_QNaN,
+ dfp_set_FPRF_from_FRT,
+};
+
+void helper_dctqpq(CPUPPCState *env, uint64_t *t, uint64_t *b)
+{
+ struct PPC_DFP dfp;
+ dfp_prepare_decimal128(&dfp, 0, 0, env);
+ decimal64ToNumber((decimal64 *)b, &dfp.t);
+ dfp_run_post_processors(&dfp, CTQPQ_PPs, ARRAY_SIZE(CTQPQ_PPs));
+ decimal128FromNumber((decimal128 *)&dfp.t64, &dfp.t, &dfp.context);
+ t[0] = dfp.t64[HI_IDX];
+ t[1] = dfp.t64[LO_IDX];
+}
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 2ef18c2..a99ca1c 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -648,4 +648,6 @@ DEF_HELPER_5(drintx, void, env, fprp, fprp, i32, i32)
DEF_HELPER_5(drintxq, void, env, fprp, fprp, i32, i32)
DEF_HELPER_5(drintn, void, env, fprp, fprp, i32, i32)
DEF_HELPER_5(drintnq, void, env, fprp, fprp, i32, i32)
+DEF_HELPER_3(dctdp, void, env, fprp, fprp)
+DEF_HELPER_3(dctqpq, void, env, fprp, fprp)
#include "exec/def-helper.h"
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 65b1503..da70c8d 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -8386,6 +8386,8 @@ GEN_DFP_T_B_U32_U32_Rc(drintx, FPW, RMC)
GEN_DFP_T_B_U32_U32_Rc(drintxq, FPW, RMC)
GEN_DFP_T_B_U32_U32_Rc(drintn, FPW, RMC)
GEN_DFP_T_B_U32_U32_Rc(drintnq, FPW, RMC)
+GEN_DFP_T_B_Rc(dctdp)
+GEN_DFP_T_B_Rc(dctqpq)
/*** SPE extension ***/
/* Register moves */
@@ -11343,6 +11345,8 @@ GEN_DFP_R_T_B_RMC_Rc(drintx, 0x03, 0x03),
GEN_DFP_R_Tp_Bp_RMC_Rc(drintxq, 0x03, 0x03),
GEN_DFP_R_T_B_RMC_Rc(drintn, 0x03, 0x07),
GEN_DFP_R_Tp_Bp_RMC_Rc(drintnq, 0x03, 0x07),
+GEN_DFP_T_B_Rc(dctdp, 0x02, 0x08),
+GEN_DFP_Tp_B_Rc(dctqpq, 0x02, 0x08),
#undef GEN_SPE
#define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \
GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type,
PPC_NONE)
--
1.7.1
