Add emulation of the PowerPC Decimal Floating Point Subtract instructions
dsub[q][.]
Signed-off-by: Tom Musta <tommu...@gmail.com>
---
target-ppc/dfp_helper.c | 18 ++++++++++++++++++
target-ppc/helper.h | 2 ++
target-ppc/translate.c | 5 ++++-
3 files changed, 24 insertions(+), 1 deletions(-)
diff --git a/target-ppc/dfp_helper.c b/target-ppc/dfp_helper.c
index 100b0d7..7fd7724 100644
--- a/target-ppc/dfp_helper.c
+++ b/target-ppc/dfp_helper.c
@@ -256,6 +256,12 @@ static void dfp_check_for_VXISI_add(struct PPC_DFP *dfp)
dfp_check_for_VXISI(dfp, 0);
}
+static void dfp_check_for_VXISI_subtract(struct PPC_DFP *dfp)
+{
+ dfp_check_for_VXISI(dfp, 1);
+}
+
+
static void dfp_run_post_processors(struct PPC_DFP *dfp,
PPC_DFP_PostProc post_processors[], const size_t n)
{
@@ -293,3 +299,15 @@ PPC_DFP_PostProc ADD_PPs[] = {
DFP_HELPER_TAB(dadd, decNumberAdd, ADD_PPs, 64)
DFP_HELPER_TAB(daddq, decNumberAdd, ADD_PPs, 128)
+
+PPC_DFP_PostProc SUB_PPs[] = {
+ dfp_set_FPRF_from_FRT,
+ dfp_check_for_OX,
+ dfp_check_for_UX,
+ dfp_check_for_XX,
+ dfp_check_for_VXSNAN,
+ dfp_check_for_VXISI_subtract,
+};
+
+DFP_HELPER_TAB(dsub, decNumberSubtract, SUB_PPs, 64)
+DFP_HELPER_TAB(dsubq, decNumberSubtract, SUB_PPs, 128)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 337c005..7ae8d03 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -620,4 +620,6 @@ DEF_HELPER_3(store_601_batu, void, env, i32, tl)
DEF_HELPER_4(dadd, void, env, fprp, fprp, fprp)
DEF_HELPER_4(daddq, void, env, fprp, fprp, fprp)
+DEF_HELPER_4(dsub, void, env, fprp, fprp, fprp)
+DEF_HELPER_4(dsubq, void, env, fprp, fprp, fprp)
#include "exec/def-helper.h"
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 4550667..80dc53c 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -8358,7 +8358,8 @@ static void gen_##name(DisasContext *ctx) \
GEN_DFP_T_A_B_Rc(dadd)
GEN_DFP_T_A_B_Rc(daddq)
-
+GEN_DFP_T_A_B_Rc(dsub)
+GEN_DFP_T_A_B_Rc(dsubq)
/*** SPE extension ***/
/* Register moves */
@@ -11288,6 +11289,8 @@ _GEN_DFP_QUADx2(name, op1, op2, 0x00210000)
GEN_DFP_T_A_B_Rc(dadd, 0x02, 0x00),
GEN_DFP_Tp_Ap_Bp_Rc(daddq, 0x02, 0x00),
+GEN_DFP_T_A_B_Rc(dsub, 0x02, 0x10),
+GEN_DFP_Tp_Ap_Bp_Rc(dsubq, 0x02, 0x10),
#undef GEN_SPE
#define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \
GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type,
PPC_NONE)
--
1.7.1
