On 6/3/2014 4:27 AM, Alexey Kardashevskiy wrote: > Compared to PowerISA-compliant CPUs, 970 family has most of them plus > PMC7/8 which are only present on 970 but not on POWER5 and later CPUs. > > Since we are changing SPRs for Book3s/970 families, let's add them too. > > Signed-off-by: Alexey Kardashevskiy <a...@ozlabs.ru> > --- > target-ppc/cpu.h | 4 ++++ > target-ppc/translate_init.c | 26 ++++++++++++++++++++++++++ > 2 files changed, 30 insertions(+) > > diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h > index 21eec1b..fc09087 100644 > --- a/target-ppc/cpu.h > +++ b/target-ppc/cpu.h > @@ -1488,9 +1488,11 @@ static inline int cpu_mmu_index (CPUPPCState *env) > #define SPR_PERF9 (0x309) > #define SPR_RCPU_L2U_RBA1 (0x309) > #define SPR_MPC_MD_CASID (0x309) > +#define SPR_970_UPMC7 (0X309) > #define SPR_PERFA (0x30A) > #define SPR_RCPU_L2U_RBA2 (0x30A) > #define SPR_MPC_MD_AP (0x30A) > +#define SPR_970_UPMC8 (0X30A) > #define SPR_PERFB (0x30B) > #define SPR_RCPU_L2U_RBA3 (0x30B) > #define SPR_MPC_MD_EPN (0x30B) > @@ -1523,7 +1525,9 @@ static inline int cpu_mmu_index (CPUPPCState *env) > #define SPR_UPERF8 (0x318) > #define SPR_POWER_PMC6 (0X318) > #define SPR_UPERF9 (0x319) > +#define SPR_970_PMC7 (0X319) > #define SPR_UPERFA (0x31A) > +#define SPR_970_PMC8 (0X31A) > #define SPR_UPERFB (0x31B) > #define SPR_POWER_MMCR0 (0X31B) > #define SPR_UPERFC (0x31C) > diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c > index e4c9a4c..0fcf918 100644 > --- a/target-ppc/translate_init.c > +++ b/target-ppc/translate_init.c > @@ -7442,6 +7442,30 @@ static void gen_spr_book3s_pmu_user(CPUPPCState *env) > 0x00000000); > } > > +static void gen_spr_970_pmu_hypv(CPUPPCState *env) > +{ > + spr_register(env, SPR_970_PMC7, "PMC7", > + SPR_NOACCESS, SPR_NOACCESS, > + &spr_read_generic, &spr_write_generic, > + 0x00000000); > + spr_register(env, SPR_970_PMC8, "PMC8", > + SPR_NOACCESS, SPR_NOACCESS, > + &spr_read_generic, &spr_write_generic, > + 0x00000000); > +} > + > +static void gen_spr_970_pmu_user(CPUPPCState *env) > +{ > + spr_register(env, SPR_970_UPMC7, "UPMC7", > + &spr_read_ureg, SPR_NOACCESS, > + &spr_read_ureg, SPR_NOACCESS, > + 0x00000000); > + spr_register(env, SPR_970_UPMC8, "UPMC8", > + &spr_read_ureg, SPR_NOACCESS, > + &spr_read_ureg, SPR_NOACCESS, > + 0x00000000); > +} > + > static void gen_spr_power5p_ear(CPUPPCState *env) > { > /* External access control */ > @@ -7464,6 +7488,8 @@ static void init_proc_970 (CPUPPCState *env) > gen_spr_970_hior(env); > gen_low_BATs(env); > gen_spr_book3s_common(env); > + gen_spr_970_pmu_hypv(env); > + gen_spr_970_pmu_user(env); > > gen_spr_power5p_ear(env); > >
Reviewed-by: Tom Musta <tommu...@gmail.com>