The SP810, which is present in the Versatile Express motherboards,
allows to set the timing reference to either REFCLK or TIMCLK.
QEMU currently sets the SP804 timer to 1MHz by default. To reflect
this, we set the TimerEn0Sel, TimerEn1Sel, TimerEn2Sel, and
TimerEn3Sel of the system control register (SCCTRL) to TIMCLK (1).
Signed-off-by: Fabian Aggeler <aggel...@ethz.ch>
---
hw/arm/vexpress.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index a88732c..086f68a 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -34,6 +34,7 @@
#include "hw/block/flash.h"
#include "sysemu/device_tree.h"
#include "qemu/error-report.h"
+#include "hw/misc/arm_sp810.h"
#include <libfdt.h>
#define VEXPRESS_BOARD_ID 0x8e0
@@ -512,7 +513,7 @@ static pflash_t *ve_pflash_cfi01_register(hwaddr base,
const char *name,
static void vexpress_common_init(VEDBoardInfo *daughterboard,
MachineState *machine)
{
- DeviceState *dev, *sysctl, *pl041;
+ DeviceState *dev, *sysctl, *pl041, *sp810;
qemu_irq pic[64];
uint32_t sys_id;
DriveInfo *dinfo;
@@ -575,7 +576,15 @@ static void vexpress_common_init(VEDBoardInfo
*daughterboard,
qdev_init_nofail(sysctl);
sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, map[VE_SYSREGS]);
- /* VE_SP810: not modelled */
+ /* VE_SP810 (SP804 running at 1MHz (TIMCLK) by default) */
+ sp810 = qdev_create(NULL, TYPE_ARM_SP810);
+ qdev_prop_set_uint8(sp810, "timeren0-sel", SCCTRL_TIMER_TIMCLK);
+ qdev_prop_set_uint8(sp810, "timeren1-sel", SCCTRL_TIMER_TIMCLK);
+ qdev_prop_set_uint8(sp810, "timeren2-sel", SCCTRL_TIMER_TIMCLK);
+ qdev_prop_set_uint8(sp810, "timeren3-sel", SCCTRL_TIMER_TIMCLK);
+ qdev_init_nofail(sp810);
+ sysbus_mmio_map(SYS_BUS_DEVICE(sp810), 0, map[VE_SP810]);
+
/* VE_SERIALPCI: not modelled */
pl041 = qdev_create(NULL, "pl041");
--
1.8.3.2
