On Tue, Sep 9, 2014 at 11:50 PM, Peter Crosthwaite <peter.crosthwa...@xilinx.com> wrote: > On Tue, Sep 9, 2014 at 6:24 PM, Alistair Francis <alistai...@gmail.com> wrote: >> This patch adds the stm32f205 SoC. This will be used by the >> Netduino 2 to create a machine >> >> Signed-off-by: Alistair Francis <alistai...@gmail.com> >> --- >> >> hw/arm/Makefile.objs | 2 +- >> hw/arm/stm32f205_soc.c | 140 >> +++++++++++++++++++++++++++++++++++++++++ >> include/hw/arm/stm32f205_soc.h | 61 ++++++++++++++++++ >> 3 files changed, 202 insertions(+), 1 deletion(-) >> create mode 100644 hw/arm/stm32f205_soc.c >> create mode 100644 include/hw/arm/stm32f205_soc.h >> >> diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs >> index 6088e53..673feef 100644 >> --- a/hw/arm/Makefile.objs >> +++ b/hw/arm/Makefile.objs >> @@ -2,7 +2,7 @@ obj-y += boot.o collie.o exynos4_boards.o gumstix.o >> highbank.o >> obj-$(CONFIG_DIGIC) += digic_boards.o >> obj-y += integratorcp.o kzm.o mainstone.o musicpal.o nseries.o >> obj-y += omap_sx1.o palm.o realview.o spitz.o stellaris.o >> -obj-y += tosa.o versatilepb.o vexpress.o virt.o xilinx_zynq.o z2.o >> +obj-y += tosa.o versatilepb.o vexpress.o virt.o xilinx_zynq.o z2.o >> stm32f205_soc.o > > New obj-y line. > >> >> obj-y += armv7m.o exynos4210.o pxa2xx.o pxa2xx_gpio.o pxa2xx_pic.o >> obj-$(CONFIG_DIGIC) += digic.o >> diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c >> new file mode 100644 >> index 0000000..da36f61 >> --- /dev/null >> +++ b/hw/arm/stm32f205_soc.c >> @@ -0,0 +1,140 @@ >> +/* >> + * STM32F205xx SoC >> + * >> + * Copyright (c) 2014 Alistair Francis <alist...@alistair23.me> >> + * >> + * Permission is hereby granted, free of charge, to any person obtaining a >> copy >> + * of this software and associated documentation files (the "Software"), to >> deal >> + * in the Software without restriction, including without limitation the >> rights >> + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell >> + * copies of the Software, and to permit persons to whom the Software is >> + * furnished to do so, subject to the following conditions: >> + * >> + * The above copyright notice and this permission notice shall be included >> in >> + * all copies or substantial portions of the Software. >> + * >> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS >> OR >> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, >> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL >> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR >> OTHER >> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING >> FROM, >> + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN >> + * THE SOFTWARE. >> + */ >> + >> +#include "hw/arm/stm32f205_soc.h" >> + >> +#define FLASH_BASE_ADDRESS 0x08000000 >> +#define FLASH_SIZE 1024 >> +#define SRAM_BASE_ADDRESS 0x20000000 >> +#define SRAM_SIZE 192 >> + >> +static void stm32f205_soc_initfn(Object *obj) >> +{ >> + STM32F205State *s = STM32F205_SOC(obj); >> + int i; >> + >> + object_initialize(&s->syscfg, sizeof(s->syscfg), TYPE_STM32F205_SYSCFG); >> + qdev_set_parent_bus(DEVICE(&s->syscfg), sysbus_get_default()); >> + >> + for (i = 0; i < 5; i++) { >> + object_initialize(&s->usart[i], sizeof(s->usart[i]), >> + TYPE_STM32F205_USART); >> + qdev_set_parent_bus(DEVICE(&s->usart[i]), sysbus_get_default()); >> + } >> + >> + for (i = 0; i < 4; i++) { >> + object_initialize(&s->timer[i], sizeof(s->timer[i]), >> + TYPE_STM32F205_TIMER); >> + qdev_set_parent_bus(DEVICE(&s->timer[i]), sysbus_get_default()); >> + } >> +} >> + >> +static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) >> +{ >> + static const uint32_t timer_addr[] = { 0x40000000, 0x40000400, >> + 0x40000800, 0x40000C00 }; > > You should add a comment about how you only model TIM2-5. This list is > to grow significantly in a fuller implementation. > >> + static const uint32_t usart_addr[] = { 0x40011000, 0x40004400, >> + 0x40004800, 0x40004C00, 0x40005000, 0x40011400 }; >> + > > Just put the static consts up top of the file so the are easily > spotted as self documentation. > >> + static const int timer_irq[] = {28, 29, 30, 50}; >> + static const int usart_irq[] = {37, 38, 39, 52, 53, 71, 82, 83}; >> + >> + STM32F205State *s = STM32F205_SOC(dev_soc); >> + DeviceState *syscfgdev, *usartdev, *timerdev; >> + SysBusDevice *syscfgbusdev, *usartbusdev, *timerbusdev; >> + qemu_irq *pic;; >> + Error *err = NULL; >> + int i; >> + >> + pic = armv7m_init(get_system_memory(), >> + FLASH_SIZE, FLASH_BASE_ADDRESS, SRAM_SIZE, 96, >> + s->kernel_filename, s->cpu_model); >> + >> + /* System configuration controller */ >> + syscfgdev = DEVICE(&s->syscfg); >> + syscfgdev->id = "stm32f205xx-syscfg"; > > Why you need to set the legacy qdev id string? If its needed I would > expect this to be init stage rather than realize.
That was just left it from testing, will remove. > >> + object_property_set_bool(OBJECT(&s->syscfg), true, "realized", &err); >> + if (err != NULL) { >> + error_propagate(errp, err); >> + return; >> + } >> + syscfgbusdev = SYS_BUS_DEVICE(syscfgdev); >> + sysbus_mmio_map(syscfgbusdev, 0, 0x40013800); >> + sysbus_connect_irq(syscfgbusdev, 0, pic[71]); >> + >> + /* Attach a UART (uses USART registers) and USART controllers */ >> + for (i = 0; i < 5; i++) { >> + usartdev = DEVICE(&(s->usart[i])); >> + object_property_set_bool(OBJECT(&s->usart[i]), true, "realized", >> &err); >> + if (err != NULL) { >> + error_propagate(errp, err); >> + return; >> + } >> + usartbusdev = SYS_BUS_DEVICE(usartdev); >> + sysbus_mmio_map(usartbusdev, 0, usart_addr[i]); >> + sysbus_connect_irq(usartbusdev, 0, pic[usart_irq[i]]); >> + } >> + >> + /* Timer 2 to 5 */ >> + for (i = 0; i < 4; i++) { >> + timerdev = DEVICE(&(s->timer[i])); >> + object_property_set_bool(OBJECT(&s->timer[i]), true, "realized", >> &err); >> + if (err != NULL) { >> + error_propagate(errp, err); >> + return; >> + } >> + timerbusdev = SYS_BUS_DEVICE(timerdev); >> + sysbus_mmio_map(timerbusdev, 0, timer_addr[i]); >> + sysbus_connect_irq(timerbusdev, 0, pic[timer_irq[i]]); >> + } >> +} >> + >> +static Property stm32f205_soc_properties[] = { >> + DEFINE_PROP_STRING("kernel-filename", STM32F205State, kernel_filename), >> + DEFINE_PROP_STRING("cpu-model", STM32F205State, cpu_model), > > Is it really configurable? You can drop cpu-model parameterisation > unless STM have similar socs with different processor you are > targetting? It's not configurable, I just thought QEMU allowed the CPU to be specified Thanks, Alistair > >> + DEFINE_PROP_END_OF_LIST(), >> +}; >> + >> +static void stm32f205_soc_class_init(ObjectClass *klass, void *data) >> +{ >> + DeviceClass *dc = DEVICE_CLASS(klass); >> + >> + dc->realize = stm32f205_soc_realize; >> + dc->props = stm32f205_soc_properties; >> +} >> + >> +static const TypeInfo stm32f205_soc_info = { >> + .name = TYPE_STM32F205_SOC, >> + .parent = TYPE_SYS_BUS_DEVICE, >> + .instance_size = sizeof(STM32F205State), >> + .instance_init = stm32f205_soc_initfn, >> + .class_init = stm32f205_soc_class_init, >> +}; >> + >> +static void stm32f205_soc_types(void) >> +{ >> + type_register_static(&stm32f205_soc_info); >> +} >> + >> +type_init(stm32f205_soc_types) >> diff --git a/include/hw/arm/stm32f205_soc.h b/include/hw/arm/stm32f205_soc.h >> new file mode 100644 >> index 0000000..d989b10 >> --- /dev/null >> +++ b/include/hw/arm/stm32f205_soc.h >> @@ -0,0 +1,61 @@ >> +/* >> + * STM32F205xx SoC >> + * >> + * Copyright (c) 2014 Alistair Francis <alist...@alistair23.me> >> + * >> + * Permission is hereby granted, free of charge, to any person obtaining a >> copy >> + * of this software and associated documentation files (the "Software"), to >> deal >> + * in the Software without restriction, including without limitation the >> rights >> + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell >> + * copies of the Software, and to permit persons to whom the Software is >> + * furnished to do so, subject to the following conditions: >> + * >> + * The above copyright notice and this permission notice shall be included >> in >> + * all copies or substantial portions of the Software. >> + * >> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS >> OR >> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, >> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL >> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR >> OTHER >> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING >> FROM, >> + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN >> + * THE SOFTWARE. >> + */ >> + >> +#ifndef HW_ARM_STM32F205SOC_H >> +#define HW_ARM_STM32F205SOC_H >> + >> +#include "hw/sysbus.h" >> +#include "hw/arm/arm.h" >> +#include "hw/ssi.h" >> +#include "hw/devices.h" >> +#include "qemu/timer.h" >> +#include "net/net.h" >> +#include "elf.h" >> +#include "hw/loader.h" >> +#include "hw/boards.h" >> +#include "exec/address-spaces.h" >> +#include "qemu/error-report.h" >> +#include "sysemu/qtest.h" >> +#include "hw/misc/stm32f205_syscfg.h" >> +#include "hw/timer/stm32f205_timer.h" >> +#include "hw/char/stm32f205_usart.h" >> + >> +#define TYPE_STM32F205_SOC "stm32f205_soc" >> +#define STM32F205_SOC(obj) \ >> + OBJECT_CHECK(STM32F205State, (obj), TYPE_STM32F205_SOC) >> + >> +typedef struct STM32F205State { >> + /*< private >*/ >> + SysBusDevice parent_obj; >> + /*< public >*/ >> + >> + char *kernel_filename; >> + char *cpu_model; >> + >> + Stm32f205SyscfgState syscfg; >> + Stm32f205UsartState usart[5]; >> + Stm32f205TimerState timer[5]; > > You can macrofiy these magic "5"s. STM_NUM_UARTS etc. > > Regards, > Peter > >> +} STM32F205State; >> + >> +#endif >> -- >> 1.9.1 >> >>