While trying to implement setcond on TCG ARM, I have discovered it does
not work anymore. I have bisected this regression to:
commit 6113d6d3169393c323ac4c82d756a850145a5e7a
Author: Paolo Bonzini <pbonz...@redhat.com>
Date: Fri Jan 15 09:42:09 2010 +0100
change while to if
The while loop will be executed exactly 0 or 1 times, depending on
env->exit_request.
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
Signed-off-by: Anthony Liguori <aligu...@us.ibm.com>
The assertion is actually triggered. When the next patch removing the
assertion is also applied it segfaults instead.
The patch does not seem to be wrong. Moreover I have tried to debug the
problem, but I failed to as it looks like an Heisenbug. Compiling this
file with -O0 also fixes the problem.
Does someone have an idea?
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurel...@aurel32.net http://www.aurel32.net
