On Mon, Jan 12, 2015 at 4:57 AM, Paolo Bonzini <pbonz...@redhat.com> wrote: > > > On 11/01/2015 04:57, sfel...@gmail.com wrote: >> +static const MemoryRegionOps rocker_mmio_ops = { >> + .read = rocker_mmio_read, >> + .write = rocker_mmio_write, >> + .endianness = DEVICE_LITTLE_ENDIAN, >> + .valid = { >> + .min_access_size = 4, >> + .max_access_size = 8, >> + }, >> + .impl = { >> + .min_access_size = 4, >> + .max_access_size = 8, >> + }, >> +}; > > I suggest that you only use 32-bit registers in the internal > implementation, where writing to the low part of a 64-bit register only > writes to a latch. You can then use .impl.max_access_size == 4 but keep > .valid.max_access_size == 8. > > QEMU will then take care of passing 64-bit writes down as two 32-bit > writes, in increasing address.
I tried setting .impl.max_access_size=4 and the Linux driver self-test fails on 64-bit reg write/read. 32-bit regs writes/reads are OK. On the 64-bit write/read, the self test writes a value and expects to read back 2x the value written. After making the change .impl.max_access_size=4, the reg reads back as 0, regardless of what was written. The driver uses writeq/readq for 64-bit writes/reads. I'm inclined to not change the device and leave .impl.max_access_size=8. -scott