On 2/22/15 09:08, Chen Gang S wrote: > On 2/22/15 08:25, Chris Metcalf wrote:
[...] >> Similarly, if any pipeline takes an exception (a TLB fault from a memory op, >> a GPV fault from an illegal mfspr, etc) then no pipeline completes its >> action. >> > > Oh, really !! And I guess, Richard's code can not be sure of it: memory > write operand (e.g st) is not buffered. If what I guess is correct, for > me, it is not quite easy to fix this issue. > > I also guess, at present, we need think of more before continue. > Oh, Richard's code is still OK, but always be sure that y2 and x1 must be the last pipe execution of the bundle: - Execute y0/y1/x0 which will save temporary changing: they are only have effect with registers, have no effect with others (e.g. memory value). Temporary variable can also be for SPR, so y1 is also OK. - Execute y2/x1, if they fail, just generate exception, then as the result, we can say "the whole bundle is not executed". - After finish y2/x1, we write back register temporary variables, then write back branch temporary variables. Thanks. -- Chen Gang Open, share, and attitude like air, water, and life which God blessed
