This replaces all calls to get_ticks_per_sec() with
NSEC_PER_SEC defined in /include/qemu/timer.h
Signed-off-by: Emil Condrea <emilcond...@gmail.com>
---
audio/audio.c | 2 +-
audio/noaudio.c | 4 ++--
audio/spiceaudio.c | 2 +-
audio/wavaudio.c | 2 +-
backends/baum.c | 2 +-
block/qed.c | 2 +-
cpus.c | 6 +++---
hw/acpi/core.c | 4 ++--
hw/arm/omap1.c | 14 +++++++-------
hw/arm/spitz.c | 2 +-
hw/arm/stellaris.c | 2 +-
hw/arm/strongarm.c | 2 +-
hw/audio/adlib.c | 2 +-
hw/audio/sb16.c | 4 ++--
hw/block/fdc.c | 2 +-
hw/block/pflash_cfi02.c | 4 ++--
hw/bt/hci-csr.c | 4 ++--
hw/bt/hci.c | 4 ++--
hw/char/cadence_uart.c | 4 ++--
hw/char/serial.c | 6 +++---
hw/display/vga.c | 6 +++---
hw/dma/rc4030.c | 2 +-
hw/ide/core.c | 2 +-
hw/input/hid.c | 2 +-
hw/input/tsc2005.c | 2 +-
hw/input/tsc210x.c | 2 +-
hw/intc/i8259.c | 2 +-
hw/mips/cputimer.c | 10 +++++-----
hw/misc/arm_sysctl.c | 2 +-
hw/misc/macio/cuda.c | 14 +++++++-------
hw/misc/macio/macio.c | 2 +-
hw/net/dp8393x.c | 2 +-
hw/net/pcnet.c | 2 +-
hw/net/rtl8139.c | 8 ++++----
hw/openrisc/cputimer.c | 4 ++--
hw/ppc/ppc.c | 18 +++++++++---------
hw/ppc/ppc405_uc.c | 4 ++--
hw/ppc/ppc_booke.c | 2 +-
hw/sd/sdhci.h | 2 +-
hw/sparc64/sun4u.c | 4 ++--
hw/timer/i8254.c | 4 ++--
hw/timer/i8254_common.c | 6 +++---
hw/timer/mc146818rtc.c | 6 +++---
hw/timer/omap_gptimer.c | 2 +-
hw/timer/omap_synctimer.c | 2 +-
hw/timer/pl031.c | 10 +++++-----
hw/timer/pxa2xx_timer.c | 14 +++++++-------
hw/timer/tusb6010.c | 4 ++--
hw/usb/hcd-ehci.c | 4 ++--
hw/usb/hcd-musb.c | 2 +-
hw/usb/hcd-ohci.c | 10 +++++-----
hw/usb/hcd-uhci.c | 6 +++---
hw/watchdog/wdt_i6300esb.c | 2 +-
hw/watchdog/wdt_ib700.c | 2 +-
include/hw/acpi/acpi.h | 2 +-
include/qemu/timer.h | 7 ++-----
monitor.c | 4 ++--
net/dump.c | 2 +-
target-arm/helper.c | 6 +++---
target-ppc/kvm.c | 4 ++--
target-ppc/kvm_ppc.c | 2 +-
61 files changed, 132 insertions(+), 135 deletions(-)
diff --git a/audio/audio.c b/audio/audio.c
index 9d018e9..c073d88 100644
--- a/audio/audio.c
+++ b/audio/audio.c
@@ -1905,7 +1905,7 @@ static void audio_init (void)
conf.period.ticks = 1;
} else {
conf.period.ticks =
- muldiv64 (1, get_ticks_per_sec (), conf.period.hertz);
+ muldiv64 (1, NSEC_PER_SEC, conf.period.hertz);
}
e = qemu_add_vm_change_state_handler (audio_vm_change_state_handler, s);
diff --git a/audio/noaudio.c b/audio/noaudio.c
index cb38662..d7b13b4 100644
--- a/audio/noaudio.c
+++ b/audio/noaudio.c
@@ -48,7 +48,7 @@ static int no_run_out (HWVoiceOut *hw, int live)
now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
ticks = now - no->old_ticks;
- bytes = muldiv64 (ticks, hw->info.bytes_per_second, get_ticks_per_sec ());
+ bytes = muldiv64 (ticks, hw->info.bytes_per_second, NSEC_PER_SEC);
bytes = audio_MIN (bytes, INT_MAX);
samples = bytes >> hw->info.shift;
@@ -105,7 +105,7 @@ static int no_run_in (HWVoiceIn *hw)
int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
int64_t ticks = now - no->old_ticks;
int64_t bytes =
- muldiv64 (ticks, hw->info.bytes_per_second, get_ticks_per_sec ());
+ muldiv64 (ticks, hw->info.bytes_per_second, NSEC_PER_SEC);
no->old_ticks = now;
bytes = audio_MIN (bytes, INT_MAX);
diff --git a/audio/spiceaudio.c b/audio/spiceaudio.c
index 7b79bed..c049524 100644
--- a/audio/spiceaudio.c
+++ b/audio/spiceaudio.c
@@ -102,7 +102,7 @@ static int rate_get_samples (struct audio_pcm_info *info,
SpiceRateCtl *rate)
now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
ticks = now - rate->start_ticks;
- bytes = muldiv64 (ticks, info->bytes_per_second, get_ticks_per_sec ());
+ bytes = muldiv64 (ticks, info->bytes_per_second, NSEC_PER_SEC);
samples = (bytes - rate->bytes_sent) >> info->shift;
if (samples < 0 || samples > 65536) {
error_report("Resetting rate control (%" PRId64 " samples)", samples);
diff --git a/audio/wavaudio.c b/audio/wavaudio.c
index 6846a1a..50d8359 100644
--- a/audio/wavaudio.c
+++ b/audio/wavaudio.c
@@ -55,7 +55,7 @@ static int wav_run_out (HWVoiceOut *hw, int live)
int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
int64_t ticks = now - wav->old_ticks;
int64_t bytes =
- muldiv64 (ticks, hw->info.bytes_per_second, get_ticks_per_sec ());
+ muldiv64 (ticks, hw->info.bytes_per_second, NSEC_PER_SEC);
if (bytes > INT_MAX) {
samples = INT_MAX >> hw->info.shift;
diff --git a/backends/baum.c b/backends/baum.c
index a69aaff..3e0f029 100644
--- a/backends/baum.c
+++ b/backends/baum.c
@@ -335,7 +335,7 @@ static int baum_eat_packet(BaumDriverState *baum, const
uint8_t *buf, int len)
/* Allow 100ms to complete the DisplayData packet */
timer_mod(baum->cellCount_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
+
- get_ticks_per_sec() / 10);
+ NSEC_PER_SEC / 10);
for (i = 0; i < baum->x * baum->y ; i++) {
EAT(c);
cells[i] = c;
diff --git a/block/qed.c b/block/qed.c
index 892b13c..bdf4059 100644
--- a/block/qed.c
+++ b/block/qed.c
@@ -344,7 +344,7 @@ static void qed_start_need_check_timer(BDRVQEDState *s)
* migration.
*/
timer_mod(s->need_check_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- get_ticks_per_sec() * QED_NEED_CHECK_TIMEOUT);
+ NSEC_PER_SEC * QED_NEED_CHECK_TIMEOUT);
}
/* It's okay to call this multiple times or when no timer is started */
diff --git a/cpus.c b/cpus.c
index 314df16..00894f3 100644
--- a/cpus.c
+++ b/cpus.c
@@ -264,7 +264,7 @@ void cpu_disable_ticks(void)
fairly approximate, so ignore small variation.
When the guest is idle real and virtual time will be aligned in
the IO wait loop. */
-#define ICOUNT_WOBBLE (get_ticks_per_sec() / 10)
+#define ICOUNT_WOBBLE (NSEC_PER_SEC / 10)
static void icount_adjust(void)
{
@@ -315,7 +315,7 @@ static void icount_adjust_vm(void *opaque)
{
timer_mod(icount_vm_timer,
qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- get_ticks_per_sec() / 10);
+ NSEC_PER_SEC / 10);
icount_adjust();
}
@@ -538,7 +538,7 @@ void configure_icount(QemuOpts *opts, Error **errp)
icount_adjust_vm, NULL);
timer_mod(icount_vm_timer,
qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- get_ticks_per_sec() / 10);
+ NSEC_PER_SEC / 10);
}
/***********************************************************/
diff --git a/hw/acpi/core.c b/hw/acpi/core.c
index 51913d6..f7862e0 100644
--- a/hw/acpi/core.c
+++ b/hw/acpi/core.c
@@ -380,7 +380,7 @@ uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar)
acpi_pm_tmr_update function uses ns for setting the timer. */
int64_t d = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
if (d >= muldiv64(ar->tmr.overflow_time,
- get_ticks_per_sec(), PM_TIMER_FREQUENCY)) {
+ NSEC_PER_SEC, PM_TIMER_FREQUENCY)) {
ar->pm1.evt.sts |= ACPI_BITMASK_TIMER_STATUS;
}
return ar->pm1.evt.sts;
@@ -474,7 +474,7 @@ void acpi_pm_tmr_update(ACPIREGS *ar, bool enable)
/* schedule a timer interruption if needed */
if (enable) {
- expire_time = muldiv64(ar->tmr.overflow_time, get_ticks_per_sec(),
+ expire_time = muldiv64(ar->tmr.overflow_time, NSEC_PER_SEC,
PM_TIMER_FREQUENCY);
timer_mod(ar->tmr.timer, expire_time);
} else {
diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c
index 0615044..18cdd22 100644
--- a/hw/arm/omap1.c
+++ b/hw/arm/omap1.c
@@ -104,7 +104,7 @@ static inline uint32_t omap_timer_read(struct
omap_mpu_timer_s *timer)
if (timer->st && timer->enable && timer->rate)
return timer->val - muldiv64(distance >> (timer->ptv + 1),
- timer->rate, get_ticks_per_sec());
+ timer->rate, NSEC_PER_SEC);
else
return timer->val;
}
@@ -122,7 +122,7 @@ static inline void omap_timer_update(struct
omap_mpu_timer_s *timer)
if (timer->enable && timer->st && timer->rate) {
timer->val = timer->reset_val; /* Should skip this on clk enable */
expires = muldiv64((uint64_t) timer->val << (timer->ptv + 1),
- get_ticks_per_sec(), timer->rate);
+ NSEC_PER_SEC, timer->rate);
/* If timer expiry would be sooner than in about 1 ms and
* auto-reload isn't set, then fire immediately. This is a hack
@@ -130,7 +130,7 @@ static inline void omap_timer_update(struct
omap_mpu_timer_s *timer)
* sets the interval to a very low value and polls the status bit
* in a busy loop when it wants to sleep just a couple of CPU
* ticks. */
- if (expires > (get_ticks_per_sec() >> 10) || timer->ar)
+ if (expires > (NSEC_PER_SEC >> 10) || timer->ar)
timer_mod(timer->timer, timer->time + expires);
else
qemu_bh_schedule(timer->tick);
@@ -613,14 +613,14 @@ static void omap_ulpd_pm_write(void *opaque, hwaddr addr,
now -= s->ulpd_gauge_start;
/* 32-kHz ticks */
- ticks = muldiv64(now, 32768, get_ticks_per_sec());
+ ticks = muldiv64(now, 32768, NSEC_PER_SEC);
s->ulpd_pm_regs[0x00 >> 2] = (ticks >> 0) & 0xffff;
s->ulpd_pm_regs[0x04 >> 2] = (ticks >> 16) & 0xffff;
if (ticks >> 32) /* OVERFLOW_32K */
s->ulpd_pm_regs[0x14 >> 2] |= 1 << 2;
/* High frequency ticks */
- ticks = muldiv64(now, 12000000, get_ticks_per_sec());
+ ticks = muldiv64(now, 12000000, NSEC_PER_SEC);
s->ulpd_pm_regs[0x08 >> 2] = (ticks >> 0) & 0xffff;
s->ulpd_pm_regs[0x0c >> 2] = (ticks >> 16) & 0xffff;
if (ticks >> 32) /* OVERFLOW_HI_FREQ */
@@ -3032,7 +3032,7 @@ static void omap_mcbsp_source_tick(void *opaque)
omap_mcbsp_rx_newdata(s);
timer_mod(s->source_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- get_ticks_per_sec());
+ NSEC_PER_SEC);
}
static void omap_mcbsp_rx_start(struct omap_mcbsp_s *s)
@@ -3078,7 +3078,7 @@ static void omap_mcbsp_sink_tick(void *opaque)
omap_mcbsp_tx_newdata(s);
timer_mod(s->sink_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- get_ticks_per_sec());
+ NSEC_PER_SEC);
}
static void omap_mcbsp_tx_start(struct omap_mcbsp_s *s)
diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c
index a16831c..6c22f1e 100644
--- a/hw/arm/spitz.c
+++ b/hw/arm/spitz.c
@@ -402,7 +402,7 @@ static void spitz_keyboard_tick(void *opaque)
}
timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- get_ticks_per_sec() / 32);
+ NSEC_PER_SEC / 32);
}
static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index cb515ec..c9fb339 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -98,7 +98,7 @@ static void gptm_reload(gptm_state *s, int n, int reset)
tick += (int64_t)count * system_clock_scale;
} else if (s->config == 1) {
/* 32-bit RTC. 1Hz tick. */
- tick += get_ticks_per_sec();
+ tick += NSEC_PER_SEC;
} else if (s->mode[n] == 0xa) {
/* PWM mode. Not implemented. */
} else {
diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c
index 3206345..ab23563 100644
--- a/hw/arm/strongarm.c
+++ b/hw/arm/strongarm.c
@@ -1021,7 +1021,7 @@ static void
strongarm_uart_update_parameters(StrongARMUARTState *s)
ssp.parity = parity;
ssp.data_bits = data_bits;
ssp.stop_bits = stop_bits;
- s->char_transmit_time = (get_ticks_per_sec() / speed) * frame_size;
+ s->char_transmit_time = (NSEC_PER_SEC / speed) * frame_size;
if (s->chr) {
qemu_chr_fe_ioctl(s->chr, CHR_IOCTL_SERIAL_SET_PARAMS, &ssp);
}
diff --git a/hw/audio/adlib.c b/hw/audio/adlib.c
index 656eb37..5742fda 100644
--- a/hw/audio/adlib.c
+++ b/hw/audio/adlib.c
@@ -173,7 +173,7 @@ static void timer_handler (int c, double interval_Sec)
s->ticking[n] = 1;
#ifdef DEBUG
- interval = get_ticks_per_sec () * interval_Sec;
+ interval = NSEC_PER_SEC * interval_Sec;
exp = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + interval;
s->exp[n] = exp;
#endif
diff --git a/hw/audio/sb16.c b/hw/audio/sb16.c
index 444eb9e..b85b2ab 100644
--- a/hw/audio/sb16.c
+++ b/hw/audio/sb16.c
@@ -762,8 +762,8 @@ static void complete (SB16State *s)
freq = s->freq > 0 ? s->freq : 11025;
samples = dsp_get_lohi (s) + 1;
bytes = samples << s->fmt_stereo << (s->fmt_bits == 16);
- ticks = muldiv64 (bytes, get_ticks_per_sec (), freq);
- if (ticks < get_ticks_per_sec () / 1024) {
+ ticks = muldiv64 (bytes, NSEC_PER_SEC, freq);
+ if (ticks < NSEC_PER_SEC / 1024) {
qemu_irq_raise (s->pic);
}
else {
diff --git a/hw/block/fdc.c b/hw/block/fdc.c
index 2bf87c9..4a471dd 100644
--- a/hw/block/fdc.c
+++ b/hw/block/fdc.c
@@ -1721,7 +1721,7 @@ static void fdctrl_handle_readid(FDCtrl *fdctrl, int
direction)
cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
timer_mod(fdctrl->result_timer,
- qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
(get_ticks_per_sec() / 50));
+ qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (NSEC_PER_SEC /
50));
}
static void fdctrl_handle_format_track(FDCtrl *fdctrl, int direction)
diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
index 074a005..e9e839a 100644
--- a/hw/block/pflash_cfi02.c
+++ b/hw/block/pflash_cfi02.c
@@ -431,7 +431,7 @@ static void pflash_write (pflash_t *pfl, hwaddr offset,
pfl->status = 0x00;
/* Let's wait 5 seconds before chip erase is done */
timer_mod(pfl->timer,
- qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
(get_ticks_per_sec() * 5));
+ qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
(NSEC_PER_SEC * 5));
break;
case 0x30:
/* Sector erase */
@@ -446,7 +446,7 @@ static void pflash_write (pflash_t *pfl, hwaddr offset,
pfl->status = 0x00;
/* Let's wait 1/2 second before sector erase is done */
timer_mod(pfl->timer,
- qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
(get_ticks_per_sec() / 2));
+ qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
(NSEC_PER_SEC / 2));
break;
default:
DPRINTF("%s: invalid command %02x (wc 5)\n", __func__, cmd);
diff --git a/hw/bt/hci-csr.c b/hw/bt/hci-csr.c
index 7b9b916..7b1b4da 100644
--- a/hw/bt/hci-csr.c
+++ b/hw/bt/hci-csr.c
@@ -362,7 +362,7 @@ static int csrhci_ioctl(struct CharDriverState *chr, int
cmd, void *arg)
switch (cmd) {
case CHR_IOCTL_SERIAL_SET_PARAMS:
ssp = (QEMUSerialSetParams *) arg;
- s->baud_delay = get_ticks_per_sec() / ssp->speed;
+ s->baud_delay = NSEC_PER_SEC / ssp->speed;
/* Moments later... (but shorter than 100ms) */
s->modem_state |= CHR_TIOCM_CTS;
break;
@@ -388,7 +388,7 @@ static void csrhci_reset(struct csrhci_s *s)
s->out_len = 0;
s->out_size = FIFO_LEN;
s->in_len = 0;
- s->baud_delay = get_ticks_per_sec();
+ s->baud_delay = NSEC_PER_SEC;
s->enable = 0;
s->in_hdr = INT_MAX;
s->in_data = INT_MAX;
diff --git a/hw/bt/hci.c b/hw/bt/hci.c
index 7ea3dc6..57fc4e8 100644
--- a/hw/bt/hci.c
+++ b/hw/bt/hci.c
@@ -595,7 +595,7 @@ static void bt_hci_inquiry_result(struct bt_hci_s *hci,
static void bt_hci_mod_timer_1280ms(QEMUTimer *timer, int period)
{
timer_mod(timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- muldiv64(period << 7, get_ticks_per_sec(), 100));
+ muldiv64(period << 7, NSEC_PER_SEC, 100));
}
static void bt_hci_inquiry_start(struct bt_hci_s *hci, int length)
@@ -1099,7 +1099,7 @@ static int bt_hci_mode_change(struct bt_hci_s *hci,
uint16_t handle,
bt_hci_event_status(hci, HCI_SUCCESS);
timer_mod(link->acl_mode_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- muldiv64(interval * 625, get_ticks_per_sec(), 1000000));
+ muldiv64(interval * 625, NSEC_PER_SEC, 1000000));
bt_hci_lmp_mode_change_master(hci, link->link, mode, interval);
return 0;
diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
index a5dc2a4..e255ef0 100644
--- a/hw/char/cadence_uart.c
+++ b/hw/char/cadence_uart.c
@@ -228,7 +228,7 @@ static void uart_parameters_setup(UartState *s)
}
packet_size += ssp.data_bits + ssp.stop_bits;
- s->char_tx_time = (get_ticks_per_sec() / ssp.speed) * packet_size;
+ s->char_tx_time = (NSEC_PER_SEC / ssp.speed) * packet_size;
if (s->chr) {
qemu_chr_fe_ioctl(s->chr, CHR_IOCTL_SERIAL_SET_PARAMS, &ssp);
}
@@ -500,7 +500,7 @@ static void cadence_uart_init(Object *obj)
sysbus_init_mmio(sbd, &s->iomem);
sysbus_init_irq(sbd, &s->irq);
- s->char_tx_time = (get_ticks_per_sec() / 9600) * 10;
+ s->char_tx_time = (NSEC_PER_SEC / 9600) * 10;
}
static int cadence_uart_post_load(void *opaque, int version_id)
diff --git a/hw/char/serial.c b/hw/char/serial.c
index 55011cf..f36ab59 100644
--- a/hw/char/serial.c
+++ b/hw/char/serial.c
@@ -177,7 +177,7 @@ static void serial_update_parameters(SerialState *s)
ssp.parity = parity;
ssp.data_bits = data_bits;
ssp.stop_bits = stop_bits;
- s->char_transmit_time = (get_ticks_per_sec() / speed) * frame_size;
+ s->char_transmit_time = (NSEC_PER_SEC / speed) * frame_size;
qemu_chr_fe_ioctl(s->chr, CHR_IOCTL_SERIAL_SET_PARAMS, &ssp);
DPRINTF("speed=%d parity=%c data=%d stop=%d\n",
@@ -216,7 +216,7 @@ static void serial_update_msl(SerialState *s)
We'll be lazy and poll only every 10ms, and only poll it at all if MSI
interrupts are turned on */
if (s->poll_msl)
- timer_mod(s->modem_status_poll, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
+ get_ticks_per_sec() / 100);
+ timer_mod(s->modem_status_poll, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
+ NSEC_PER_SEC / 100);
}
static gboolean serial_xmit(GIOChannel *chan, GIOCondition cond, void *opaque)
@@ -831,7 +831,7 @@ static void serial_reset(void *opaque)
s->mcr = UART_MCR_OUT2;
s->scr = 0;
s->tsr_retry = 0;
- s->char_transmit_time = (get_ticks_per_sec() / 9600) * 10;
+ s->char_transmit_time = (NSEC_PER_SEC / 9600) * 10;
s->poll_msl = 0;
s->timeout_ipending = 0;
diff --git a/hw/display/vga.c b/hw/display/vga.c
index d1d296c..64c439c 100644
--- a/hw/display/vga.c
+++ b/hw/display/vga.c
@@ -234,9 +234,9 @@ static void vga_precise_update_retrace_info(VGACommonState
*s)
r->total_chars = vtotal_lines * htotal_chars;
if (r->freq) {
- r->ticks_per_char = get_ticks_per_sec() / (r->total_chars * r->freq);
+ r->ticks_per_char = NSEC_PER_SEC / (r->total_chars * r->freq);
} else {
- r->ticks_per_char = get_ticks_per_sec() / chars_per_sec;
+ r->ticks_per_char = NSEC_PER_SEC / chars_per_sec;
}
r->vstart = vretr_start_line;
@@ -264,7 +264,7 @@ static void vga_precise_update_retrace_info(VGACommonState
*s)
"dots = %d\n"
"ticks/char = %" PRId64 "\n"
"\n",
- (double) get_ticks_per_sec() / (r->ticks_per_char * r->total_chars),
+ (double) NSEC_PER_SEC / (r->ticks_per_char * r->total_chars),
htotal_chars,
hretr_start_char,
hretr_skew_chars,
diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c
index af26632..2a19757 100644
--- a/hw/dma/rc4030.c
+++ b/hw/dma/rc4030.c
@@ -108,7 +108,7 @@ static void set_next_tick(rc4030State *s)
tm_hz = 1000 / (s->itr + 1);
timer_mod(s->periodic_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- get_ticks_per_sec() / tm_hz);
+ NSEC_PER_SEC / tm_hz);
}
/* called for accesses to rc4030 */
diff --git a/hw/ide/core.c b/hw/ide/core.c
index ef52f35..fbfdf38 100644
--- a/hw/ide/core.c
+++ b/hw/ide/core.c
@@ -867,7 +867,7 @@ static void ide_sector_write_cb(void *opaque, int ret)
option _only_ to install Windows 2000. You must disable it
for normal use. */
timer_mod(s->sector_write_timer,
- qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
(get_ticks_per_sec() / 1000));
+ qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (NSEC_PER_SEC /
1000));
} else {
ide_set_irq(s->bus);
}
diff --git a/hw/input/hid.c b/hw/input/hid.c
index 6841cb8..c1dc615 100644
--- a/hw/input/hid.c
+++ b/hw/input/hid.c
@@ -95,7 +95,7 @@ void hid_set_next_idle(HIDState *hs)
{
if (hs->idle) {
uint64_t expire_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- get_ticks_per_sec() * hs->idle * 4 / 1000;
+ NSEC_PER_SEC * hs->idle * 4 / 1000;
if (!hs->idle_timer) {
hs->idle_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, hid_idle_timer,
hs);
}
diff --git a/hw/input/tsc2005.c b/hw/input/tsc2005.c
index 21d4f4d..af06f4a 100644
--- a/hw/input/tsc2005.c
+++ b/hw/input/tsc2005.c
@@ -290,7 +290,7 @@ static void tsc2005_pin_update(TSC2005State *s)
s->precision = s->nextprecision;
s->function = s->nextfunction;
s->pdst = !s->pnd0; /* Synchronised on internal clock */
- expires = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (get_ticks_per_sec() >>
7);
+ expires = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (NSEC_PER_SEC >> 7);
timer_mod(s->timer, expires);
}
diff --git a/hw/input/tsc210x.c b/hw/input/tsc210x.c
index fae3385..06e4943 100644
--- a/hw/input/tsc210x.c
+++ b/hw/input/tsc210x.c
@@ -834,7 +834,7 @@ static void tsc210x_pin_update(TSC210xState *s)
s->busy = 1;
s->precision = s->nextprecision;
s->function = s->nextfunction;
- expires = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (get_ticks_per_sec() >>
10);
+ expires = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (NSEC_PER_SEC >> 10);
timer_mod(s->timer, expires);
}
diff --git a/hw/intc/i8259.c b/hw/intc/i8259.c
index 0f5c025..a469cdb 100644
--- a/hw/intc/i8259.c
+++ b/hw/intc/i8259.c
@@ -229,7 +229,7 @@ int pic_read_irq(DeviceState *d)
printf("IRQ%d latency=%0.3fus\n",
irq,
(double)(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) -
- irq_time[irq]) * 1000000.0 / get_ticks_per_sec());
+ irq_time[irq]) * 1000000.0 / NSEC_PER_SEC);
#endif
DPRINTF("pic_interrupt: irq=%d\n", irq);
return intno;
diff --git a/hw/mips/cputimer.c b/hw/mips/cputimer.c
index 577c9ae..5cc0768 100644
--- a/hw/mips/cputimer.c
+++ b/hw/mips/cputimer.c
@@ -50,8 +50,8 @@ static void cpu_mips_timer_update(CPUMIPSState *env)
now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
wait = env->CP0_Compare - env->CP0_Count -
- (uint32_t)muldiv64(now, TIMER_FREQ, get_ticks_per_sec());
- next = now + muldiv64(wait, get_ticks_per_sec(), TIMER_FREQ);
+ (uint32_t)muldiv64(now, TIMER_FREQ, NSEC_PER_SEC);
+ next = now + muldiv64(wait, NSEC_PER_SEC, TIMER_FREQ);
timer_mod(env->timer, next);
}
@@ -80,7 +80,7 @@ uint32_t cpu_mips_get_count (CPUMIPSState *env)
}
return env->CP0_Count +
- (uint32_t)muldiv64(now, TIMER_FREQ, get_ticks_per_sec());
+ (uint32_t)muldiv64(now, TIMER_FREQ, NSEC_PER_SEC);
}
}
@@ -97,7 +97,7 @@ void cpu_mips_store_count (CPUMIPSState *env, uint32_t count)
/* Store new count register */
env->CP0_Count =
count - (uint32_t)muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
- TIMER_FREQ, get_ticks_per_sec());
+ TIMER_FREQ, NSEC_PER_SEC);
/* Update timer timer */
cpu_mips_timer_update(env);
}
@@ -122,7 +122,7 @@ void cpu_mips_stop_count(CPUMIPSState *env)
{
/* Store the current value */
env->CP0_Count += (uint32_t)muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
- TIMER_FREQ, get_ticks_per_sec());
+ TIMER_FREQ, NSEC_PER_SEC);
}
static void mips_timer_cb (void *opaque)
diff --git a/hw/misc/arm_sysctl.c b/hw/misc/arm_sysctl.c
index 3fad6f8..ee3dece 100644
--- a/hw/misc/arm_sysctl.c
+++ b/hw/misc/arm_sysctl.c
@@ -170,7 +170,7 @@ static uint64_t arm_sysctl_read(void *opaque, hwaddr offset,
case 0x58: /* BOOTCS */
return 0;
case 0x5c: /* 24MHz */
- return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 24000000,
get_ticks_per_sec());
+ return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 24000000,
NSEC_PER_SEC);
case 0x60: /* MISC */
return 0;
case 0x84: /* PROCID0 */
diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
index f3984e3..90a490d 100644
--- a/hw/misc/macio/cuda.c
+++ b/hw/misc/macio/cuda.c
@@ -126,7 +126,7 @@ static void cuda_update_irq(CUDAState *s)
static uint64_t get_tb(uint64_t freq)
{
return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
- freq, get_ticks_per_sec());
+ freq, NSEC_PER_SEC);
}
static unsigned int get_counter(CUDATimer *s)
@@ -168,7 +168,7 @@ static int64_t get_next_irq_time(CUDATimer *s, int64_t
current_time)
/* current counter value */
d = muldiv64(current_time - s->load_time,
- CUDA_TIMER_FREQ, get_ticks_per_sec());
+ CUDA_TIMER_FREQ, NSEC_PER_SEC);
/* the timer goes down from latch to -1 (period of latch + 2) */
if (d <= (s->counter_value + 1)) {
counter = (s->counter_value - d) & 0xffff;
@@ -187,7 +187,7 @@ static int64_t get_next_irq_time(CUDATimer *s, int64_t
current_time)
}
CUDA_DPRINTF("latch=%d counter=%" PRId64 " delta_next=%" PRId64 "\n",
s->latch, d, next_time - d);
- next_time = muldiv64(next_time, get_ticks_per_sec(), CUDA_TIMER_FREQ) +
+ next_time = muldiv64(next_time, NSEC_PER_SEC, CUDA_TIMER_FREQ) +
s->load_time;
if (next_time <= current_time)
next_time = current_time + 1;
@@ -474,7 +474,7 @@ static void cuda_adb_poll(void *opaque)
}
timer_mod(s->adb_poll_timer,
qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- (get_ticks_per_sec() / CUDA_ADB_POLL_FREQ));
+ (NSEC_PER_SEC / CUDA_ADB_POLL_FREQ));
}
static void cuda_receive_packet(CUDAState *s,
@@ -492,7 +492,7 @@ static void cuda_receive_packet(CUDAState *s,
if (autopoll) {
timer_mod(s->adb_poll_timer,
qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- (get_ticks_per_sec() / CUDA_ADB_POLL_FREQ));
+ (NSEC_PER_SEC / CUDA_ADB_POLL_FREQ));
} else {
timer_del(s->adb_poll_timer);
}
@@ -503,14 +503,14 @@ static void cuda_receive_packet(CUDAState *s,
break;
case CUDA_SET_TIME:
ti = (((uint32_t)data[1]) << 24) + (((uint32_t)data[2]) << 16) +
(((uint32_t)data[3]) << 8) + data[4];
- s->tick_offset = ti - (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) /
get_ticks_per_sec());
+ s->tick_offset = ti - (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) /
NSEC_PER_SEC);
obuf[0] = CUDA_PACKET;
obuf[1] = 0;
obuf[2] = 0;
cuda_send_packet_to_host(s, obuf, 3);
break;
case CUDA_GET_TIME:
- ti = s->tick_offset + (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) /
get_ticks_per_sec());
+ ti = s->tick_offset + (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) /
NSEC_PER_SEC);
obuf[0] = CUDA_PACKET;
obuf[1] = 0;
obuf[2] = 0;
diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c
index 063ad80..b7ef411 100644
--- a/hw/misc/macio/macio.c
+++ b/hw/misc/macio/macio.c
@@ -247,7 +247,7 @@ static uint64_t timer_read(void *opaque, hwaddr addr,
unsigned size)
uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
uint64_t kltime;
- kltime = muldiv64(systime, 4194300, get_ticks_per_sec() * 4);
+ kltime = muldiv64(systime, 4194300, NSEC_PER_SEC * 4);
kltime = muldiv64(kltime, 18432000, 1048575);
switch (addr) {
diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c
index 7ce13d2..4963355 100644
--- a/hw/net/dp8393x.c
+++ b/hw/net/dp8393x.c
@@ -292,7 +292,7 @@ static void set_next_tick(dp8393xState *s)
ticks = s->regs[SONIC_WT1] << 16 | s->regs[SONIC_WT0];
s->wt_last_update = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
- delay = get_ticks_per_sec() * ticks / 5000000;
+ delay = NSEC_PER_SEC * ticks / 5000000;
timer_mod(s->watchdog, s->wt_last_update + delay);
}
diff --git a/hw/net/pcnet.c b/hw/net/pcnet.c
index bdfd38f..8689671 100644
--- a/hw/net/pcnet.c
+++ b/hw/net/pcnet.c
@@ -671,7 +671,7 @@ static inline int64_t pcnet_get_next_poll_time(PCNetState
*s, int64_t current_ti
{
int64_t next_time = current_time +
muldiv64(65536 - (CSR_SPND(s) ? 0 : CSR_POLL(s)),
- get_ticks_per_sec(), 33000000L);
+ NSEC_PER_SEC, 33000000L);
if (next_time <= current_time)
next_time = current_time + 1;
return next_time;
diff --git a/hw/net/rtl8139.c b/hw/net/rtl8139.c
index f868108..d2251bd 100644
--- a/hw/net/rtl8139.c
+++ b/hw/net/rtl8139.c
@@ -2865,7 +2865,7 @@ static void rtl8139_io_writew(void *opaque, uint8_t addr,
uint32_t val)
static void rtl8139_set_next_tctr_time(RTL8139State *s)
{
const uint64_t ns_per_period =
- muldiv64(0x100000000LL, get_ticks_per_sec(), PCI_FREQUENCY);
+ muldiv64(0x100000000LL, NSEC_PER_SEC, PCI_FREQUENCY);
DPRINTF("entered rtl8139_set_next_tctr_time\n");
@@ -2883,7 +2883,7 @@ static void rtl8139_set_next_tctr_time(RTL8139State *s)
if (!s->TimerInt) {
timer_del(s->timer);
} else {
- uint64_t delta = muldiv64(s->TimerInt, get_ticks_per_sec(),
PCI_FREQUENCY);
+ uint64_t delta = muldiv64(s->TimerInt, NSEC_PER_SEC, PCI_FREQUENCY);
if (s->TCTR_base + delta <= qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)) {
delta += ns_per_period;
}
@@ -3158,7 +3158,7 @@ static uint32_t rtl8139_io_readl(void *opaque, uint8_t
addr)
case Timer:
ret = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) -
s->TCTR_base,
- PCI_FREQUENCY, get_ticks_per_sec());
+ PCI_FREQUENCY, NSEC_PER_SEC);
DPRINTF("TCTR Timer read val=0x%08x\n", ret);
break;
@@ -3252,7 +3252,7 @@ static void rtl8139_pre_save(void *opaque)
/* for migration to older versions */
s->TCTR = muldiv64(current_time - s->TCTR_base, PCI_FREQUENCY,
- get_ticks_per_sec());
+ NSEC_PER_SEC);
s->rtl8139_mmio_io_addr_dummy = 0;
}
diff --git a/hw/openrisc/cputimer.c b/hw/openrisc/cputimer.c
index 9c54945..01f627f 100644
--- a/hw/openrisc/cputimer.c
+++ b/hw/openrisc/cputimer.c
@@ -37,7 +37,7 @@ void cpu_openrisc_count_update(OpenRISCCPU *cpu)
}
now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
cpu->env.ttcr += (uint32_t)muldiv64(now - last_clk, TIMER_FREQ,
- get_ticks_per_sec());
+ NSEC_PER_SEC);
last_clk = now;
}
@@ -59,7 +59,7 @@ void cpu_openrisc_timer_update(OpenRISCCPU *cpu)
} else {
wait = (cpu->env.ttmr & TTMR_TP) - (cpu->env.ttcr & TTMR_TP);
}
- next = now + muldiv64(wait, get_ticks_per_sec(), TIMER_FREQ);
+ next = now + muldiv64(wait, NSEC_PER_SEC, TIMER_FREQ);
timer_mod(cpu->env.timer, next);
}
diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c
index 99db56c..12c9c78 100644
--- a/hw/ppc/ppc.c
+++ b/hw/ppc/ppc.c
@@ -464,7 +464,7 @@ void ppce500_set_mpic_proxy(bool enabled)
uint64_t cpu_ppc_get_tb(ppc_tb_t *tb_env, uint64_t vmclk, int64_t tb_offset)
{
/* TB time in tb periods */
- return muldiv64(vmclk, tb_env->tb_freq, get_ticks_per_sec()) + tb_offset;
+ return muldiv64(vmclk, tb_env->tb_freq, NSEC_PER_SEC) + tb_offset;
}
uint64_t cpu_ppc_load_tbl (CPUPPCState *env)
@@ -505,7 +505,7 @@ uint32_t cpu_ppc_load_tbu (CPUPPCState *env)
static inline void cpu_ppc_store_tb(ppc_tb_t *tb_env, uint64_t vmclk,
int64_t *tb_offsetp, uint64_t value)
{
- *tb_offsetp = value - muldiv64(vmclk, tb_env->tb_freq,
get_ticks_per_sec());
+ *tb_offsetp = value - muldiv64(vmclk, tb_env->tb_freq, NSEC_PER_SEC);
LOG_TB("%s: tb %016" PRIx64 " offset %08" PRIx64 "\n",
__func__, value, *tb_offsetp);
}
@@ -639,11 +639,11 @@ static inline uint32_t _cpu_ppc_load_decr(CPUPPCState
*env, uint64_t next)
diff = next - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
if (diff >= 0) {
- decr = muldiv64(diff, tb_env->decr_freq, get_ticks_per_sec());
+ decr = muldiv64(diff, tb_env->decr_freq, NSEC_PER_SEC);
} else if (tb_env->flags & PPC_TIMER_BOOKE) {
decr = 0;
} else {
- decr = -muldiv64(-diff, tb_env->decr_freq, get_ticks_per_sec());
+ decr = -muldiv64(-diff, tb_env->decr_freq, NSEC_PER_SEC);
}
LOG_TB("%s: %08" PRIx32 "\n", __func__, decr);
@@ -675,7 +675,7 @@ uint64_t cpu_ppc_load_purr (CPUPPCState *env)
diff = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - tb_env->purr_start;
- return tb_env->purr_load + muldiv64(diff, tb_env->tb_freq,
get_ticks_per_sec());
+ return tb_env->purr_load + muldiv64(diff, tb_env->tb_freq, NSEC_PER_SEC);
}
/* When decrementer expires,
@@ -751,7 +751,7 @@ static void __cpu_ppc_store_decr(PowerPCCPU *cpu, uint64_t
*nextp,
/* Calculate the next timer event */
now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
- next = now + muldiv64(value, get_ticks_per_sec(), tb_env->decr_freq);
+ next = now + muldiv64(value, NSEC_PER_SEC, tb_env->decr_freq);
*nextp = next;
/* Adjust timer */
@@ -1011,7 +1011,7 @@ static void cpu_4xx_fit_cb (void *opaque)
/* Cannot occur, but makes gcc happy */
return;
}
- next = now + muldiv64(next, get_ticks_per_sec(), tb_env->tb_freq);
+ next = now + muldiv64(next, NSEC_PER_SEC, tb_env->tb_freq);
if (next == now)
next++;
timer_mod(ppc40x_timer->fit_timer, next);
@@ -1042,7 +1042,7 @@ static void start_stop_pit (CPUPPCState *env, ppc_tb_t
*tb_env, int is_excp)
__func__, ppc40x_timer->pit_reload);
now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
next = now + muldiv64(ppc40x_timer->pit_reload,
- get_ticks_per_sec(), tb_env->decr_freq);
+ NSEC_PER_SEC, tb_env->decr_freq);
if (is_excp)
next += tb_env->decr_next - now;
if (next == now)
@@ -1107,7 +1107,7 @@ static void cpu_4xx_wdt_cb (void *opaque)
/* Cannot occur, but makes gcc happy */
return;
}
- next = now + muldiv64(next, get_ticks_per_sec(), tb_env->decr_freq);
+ next = now + muldiv64(next, NSEC_PER_SEC, tb_env->decr_freq);
if (next == now)
next++;
LOG_TB("%s: TCR " TARGET_FMT_lx " TSR " TARGET_FMT_lx "\n", __func__,
diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c
index c77434a..acc6016 100644
--- a/hw/ppc/ppc405_uc.c
+++ b/hw/ppc/ppc405_uc.c
@@ -1352,7 +1352,7 @@ static uint32_t ppc4xx_gpt_readl (void *opaque, hwaddr
addr)
case 0x00:
/* Time base counter */
ret = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + gpt->tb_offset,
- gpt->tb_freq, get_ticks_per_sec());
+ gpt->tb_freq, NSEC_PER_SEC);
break;
case 0x10:
/* Output enable */
@@ -1407,7 +1407,7 @@ static void ppc4xx_gpt_writel (void *opaque,
switch (addr) {
case 0x00:
/* Time base counter */
- gpt->tb_offset = muldiv64(value, get_ticks_per_sec(), gpt->tb_freq)
+ gpt->tb_offset = muldiv64(value, NSEC_PER_SEC, gpt->tb_freq)
- qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
ppc4xx_gpt_compute_timer(gpt);
break;
diff --git a/hw/ppc/ppc_booke.c b/hw/ppc/ppc_booke.c
index 8b94da6..681a142 100644
--- a/hw/ppc/ppc_booke.c
+++ b/hw/ppc/ppc_booke.c
@@ -162,7 +162,7 @@ static void booke_update_fixed_timer(CPUPPCState
*env,
ticks += delta_tick;
}
- *next = now + muldiv64(ticks, get_ticks_per_sec(), tb_env->tb_freq);
+ *next = now + muldiv64(ticks, NSEC_PER_SEC, tb_env->tb_freq);
if ((*next < now) || (*next > INT64_MAX)) {
/* Overflow, so assume the biggest number the qemu timer supports. */
*next = INT64_MAX;
diff --git a/hw/sd/sdhci.h b/hw/sd/sdhci.h
index 3352d23..7ccee8d 100644
--- a/hw/sd/sdhci.h
+++ b/hw/sd/sdhci.h
@@ -220,7 +220,7 @@
#define SD_HOST_SPECv2_VERS 0x2401
#define SDHC_REGISTERS_MAP_SIZE 0x100
-#define SDHC_INSERTION_DELAY (get_ticks_per_sec())
+#define SDHC_INSERTION_DELAY (NSEC_PER_SEC)
#define SDHC_TRANSFER_DELAY 100
#define SDHC_ADMA_DESCS_PER_DELAY 5
#define SDHC_CMD_RESPONSE (3 << 0)
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index f027caf..86b27fa 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -484,12 +484,12 @@ static void hstick_irq(void *opaque)
static int64_t cpu_to_timer_ticks(int64_t cpu_ticks, uint32_t frequency)
{
- return muldiv64(cpu_ticks, get_ticks_per_sec(), frequency);
+ return muldiv64(cpu_ticks, NSEC_PER_SEC, frequency);
}
static uint64_t timer_to_cpu_ticks(int64_t timer_ticks, uint32_t frequency)
{
- return muldiv64(timer_ticks, frequency, get_ticks_per_sec());
+ return muldiv64(timer_ticks, frequency, NSEC_PER_SEC);
}
void cpu_tick_set_count(CPUTimer *timer, uint64_t count)
diff --git a/hw/timer/i8254.c b/hw/timer/i8254.c
index 3450c98..fd686ce 100644
--- a/hw/timer/i8254.c
+++ b/hw/timer/i8254.c
@@ -52,7 +52,7 @@ static int pit_get_count(PITChannelState *s)
int counter;
d = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - s->count_load_time,
PIT_FREQ,
- get_ticks_per_sec());
+ NSEC_PER_SEC);
switch(s->mode) {
case 0:
case 1:
@@ -256,7 +256,7 @@ static void pit_irq_timer_update(PITChannelState *s,
int64_t current_time)
#ifdef DEBUG_PIT
printf("irq_level=%d next_delay=%f\n",
irq_level,
- (double)(expire_time - current_time) / get_ticks_per_sec());
+ (double)(expire_time - current_time) / NSEC_PER_SEC);
#endif
s->next_transition_time = expire_time;
if (expire_time != -1)
diff --git a/hw/timer/i8254_common.c b/hw/timer/i8254_common.c
index 07345f6..2c598f0 100644
--- a/hw/timer/i8254_common.c
+++ b/hw/timer/i8254_common.c
@@ -46,7 +46,7 @@ int pit_get_out(PITChannelState *s, int64_t current_time)
int out;
d = muldiv64(current_time - s->count_load_time, PIT_FREQ,
- get_ticks_per_sec());
+ NSEC_PER_SEC);
switch (s->mode) {
default:
case 0:
@@ -80,7 +80,7 @@ int64_t pit_get_next_transition_time(PITChannelState *s,
int64_t current_time)
int period2;
d = muldiv64(current_time - s->count_load_time, PIT_FREQ,
- get_ticks_per_sec());
+ NSEC_PER_SEC);
switch (s->mode) {
default:
case 0:
@@ -120,7 +120,7 @@ int64_t pit_get_next_transition_time(PITChannelState *s,
int64_t current_time)
break;
}
/* convert to timer units */
- next_time = s->count_load_time + muldiv64(next_time, get_ticks_per_sec(),
+ next_time = s->count_load_time + muldiv64(next_time, NSEC_PER_SEC,
PIT_FREQ);
/* fix potential rounding problems */
/* XXX: better solution: use a clock at PIT_FREQ Hz */
diff --git a/hw/timer/mc146818rtc.c b/hw/timer/mc146818rtc.c
index f2b77fa..a9e492b 100644
--- a/hw/timer/mc146818rtc.c
+++ b/hw/timer/mc146818rtc.c
@@ -120,7 +120,7 @@ static void rtc_coalesced_timer_update(RTCState *s)
/* divide each RTC interval to 2 - 8 smaller intervals */
int c = MIN(s->irq_coalesced, 7) + 1;
int64_t next_clock = qemu_clock_get_ns(rtc_clock) +
- muldiv64(s->period / c, get_ticks_per_sec(), RTC_CLOCK_RATE);
+ muldiv64(s->period / c, NSEC_PER_SEC, RTC_CLOCK_RATE);
timer_mod(s->coalesced_timer, next_clock);
}
}
@@ -166,10 +166,10 @@ static void periodic_timer_update(RTCState *s, int64_t
current_time)
s->period = period;
#endif
/* compute 32 khz clock */
- cur_clock = muldiv64(current_time, RTC_CLOCK_RATE,
get_ticks_per_sec());
+ cur_clock = muldiv64(current_time, RTC_CLOCK_RATE, NSEC_PER_SEC);
next_irq_clock = (cur_clock & ~(period - 1)) + period;
s->next_periodic_time =
- muldiv64(next_irq_clock, get_ticks_per_sec(), RTC_CLOCK_RATE) + 1;
+ muldiv64(next_irq_clock, NSEC_PER_SEC, RTC_CLOCK_RATE) + 1;
timer_mod(s->periodic_timer, s->next_periodic_time);
} else {
#ifdef TARGET_I386
diff --git a/hw/timer/omap_gptimer.c b/hw/timer/omap_gptimer.c
index b8c8c01..031917f 100644
--- a/hw/timer/omap_gptimer.c
+++ b/hw/timer/omap_gptimer.c
@@ -401,7 +401,7 @@ static void omap_gp_timer_write(void *opaque, hwaddr addr,
if (s->trigger == gpt_trigger_none)
omap_gp_timer_out(s, s->scpwm);
/* TODO: make sure this doesn't overflow 32-bits */
- s->ticks_per_sec = get_ticks_per_sec() << (s->pre ? s->ptv + 1 : 0);
+ s->ticks_per_sec = NSEC_PER_SEC << (s->pre ? s->ptv + 1 : 0);
omap_gp_timer_update(s);
break;
diff --git a/hw/timer/omap_synctimer.c b/hw/timer/omap_synctimer.c
index 8e50488..cf76f75 100644
--- a/hw/timer/omap_synctimer.c
+++ b/hw/timer/omap_synctimer.c
@@ -28,7 +28,7 @@ struct omap_synctimer_s {
/* 32-kHz Sync Timer of the OMAP2 */
static uint32_t omap_synctimer_read(struct omap_synctimer_s *s) {
- return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 0x8000,
get_ticks_per_sec());
+ return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 0x8000,
NSEC_PER_SEC);
}
void omap_synctimer_reset(struct omap_synctimer_s *s)
diff --git a/hw/timer/pl031.c b/hw/timer/pl031.c
index 34d9b44..e0943ad6 100644
--- a/hw/timer/pl031.c
+++ b/hw/timer/pl031.c
@@ -79,7 +79,7 @@ static void pl031_interrupt(void * opaque)
static uint32_t pl031_get_count(PL031State *s)
{
int64_t now = qemu_clock_get_ns(rtc_clock);
- return s->tick_offset + now / get_ticks_per_sec();
+ return s->tick_offset + now / NSEC_PER_SEC;
}
static void pl031_set_alarm(PL031State *s)
@@ -95,7 +95,7 @@ static void pl031_set_alarm(PL031State *s)
pl031_interrupt(s);
} else {
int64_t now = qemu_clock_get_ns(rtc_clock);
- timer_mod(s->timer, now + (int64_t)ticks * get_ticks_per_sec());
+ timer_mod(s->timer, now + (int64_t)ticks * NSEC_PER_SEC);
}
}
@@ -202,7 +202,7 @@ static int pl031_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
qemu_get_timedate(&tm, 0);
s->tick_offset = mktimegm(&tm) -
- qemu_clock_get_ns(rtc_clock) / get_ticks_per_sec();
+ qemu_clock_get_ns(rtc_clock) / NSEC_PER_SEC;
s->timer = timer_new_ns(rtc_clock, pl031_interrupt, s);
return 0;
@@ -215,7 +215,7 @@ static void pl031_pre_save(void *opaque)
/* tick_offset is base_time - rtc_clock base time. Instead, we want to
* store the base time relative to the QEMU_CLOCK_VIRTUAL for
backwards-compatibility. */
int64_t delta = qemu_clock_get_ns(rtc_clock) -
qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
- s->tick_offset_vmstate = s->tick_offset + delta / get_ticks_per_sec();
+ s->tick_offset_vmstate = s->tick_offset + delta / NSEC_PER_SEC;
}
static int pl031_post_load(void *opaque, int version_id)
@@ -223,7 +223,7 @@ static int pl031_post_load(void *opaque, int version_id)
PL031State *s = opaque;
int64_t delta = qemu_clock_get_ns(rtc_clock) -
qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
- s->tick_offset = s->tick_offset_vmstate - delta / get_ticks_per_sec();
+ s->tick_offset = s->tick_offset_vmstate - delta / NSEC_PER_SEC;
pl031_set_alarm(s);
return 0;
}
diff --git a/hw/timer/pxa2xx_timer.c b/hw/timer/pxa2xx_timer.c
index 130e9dc..4eb68fb 100644
--- a/hw/timer/pxa2xx_timer.c
+++ b/hw/timer/pxa2xx_timer.c
@@ -118,11 +118,11 @@ static void pxa2xx_timer_update(void *opaque, uint64_t
now_qemu)
uint64_t new_qemu;
now_vm = s->clock +
- muldiv64(now_qemu - s->lastload, s->freq, get_ticks_per_sec());
+ muldiv64(now_qemu - s->lastload, s->freq, NSEC_PER_SEC);
for (i = 0; i < 4; i ++) {
new_qemu = now_qemu + muldiv64((uint32_t) (s->timer[i].value - now_vm),
- get_ticks_per_sec(), s->freq);
+ NSEC_PER_SEC, s->freq);
timer_mod(s->timer[i].qtimer, new_qemu);
}
}
@@ -147,10 +147,10 @@ static void pxa2xx_timer_update4(void *opaque, uint64_t
now_qemu, int n)
now_vm = s->tm4[counter].clock + muldiv64(now_qemu -
s->tm4[counter].lastload,
- s->tm4[counter].freq, get_ticks_per_sec());
+ s->tm4[counter].freq, NSEC_PER_SEC);
new_qemu = now_qemu + muldiv64((uint32_t) (s->tm4[n].tm.value - now_vm),
- get_ticks_per_sec(), s->tm4[counter].freq);
+ NSEC_PER_SEC, s->tm4[counter].freq);
timer_mod(s->tm4[n].tm.qtimer, new_qemu);
}
@@ -189,7 +189,7 @@ static uint64_t pxa2xx_timer_read(void *opaque, hwaddr
offset,
return s->tm4[tm].tm.value;
case OSCR:
return s->clock + muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) -
- s->lastload, s->freq, get_ticks_per_sec());
+ s->lastload, s->freq, NSEC_PER_SEC);
case OSCR11: tm ++;
/* fall through */
case OSCR10: tm ++;
@@ -213,7 +213,7 @@ static uint64_t pxa2xx_timer_read(void *opaque, hwaddr
offset,
s->snapshot = s->tm4[tm - 1].clock + muldiv64(
qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) -
s->tm4[tm - 1].lastload,
- s->tm4[tm - 1].freq, get_ticks_per_sec());
+ s->tm4[tm - 1].freq, NSEC_PER_SEC);
else
s->snapshot = s->tm4[tm - 1].clock;
}
@@ -221,7 +221,7 @@ static uint64_t pxa2xx_timer_read(void *opaque, hwaddr
offset,
if (!s->tm4[tm].freq)
return s->tm4[tm].clock;
return s->tm4[tm].clock +
muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) -
- s->tm4[tm].lastload, s->tm4[tm].freq,
get_ticks_per_sec());
+ s->tm4[tm].lastload, s->tm4[tm].freq, NSEC_PER_SEC);
case OIER:
return s->irq_enabled;
case OSSR: /* Status register */
diff --git a/hw/timer/tusb6010.c b/hw/timer/tusb6010.c
index 459c748..c5a07ea 100644
--- a/hw/timer/tusb6010.c
+++ b/hw/timer/tusb6010.c
@@ -515,7 +515,7 @@ static void tusb_async_writew(void *opaque, hwaddr addr,
if (value & TUSB_DEV_OTG_TIMER_ENABLE)
timer_mod(s->otg_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
muldiv64(TUSB_DEV_OTG_TIMER_VAL(value),
- get_ticks_per_sec(), TUSB_DEVCLOCK));
+ NSEC_PER_SEC, TUSB_DEVCLOCK));
else
timer_del(s->otg_timer);
break;
@@ -726,7 +726,7 @@ static void tusb6010_power(TUSBState *s, int on)
s->intr_ok = 0;
tusb_intr_update(s);
timer_mod(s->pwr_timer,
- qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
get_ticks_per_sec() / 2);
+ qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + NSEC_PER_SEC /
2);
}
}
diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
index d4d7547..2933c64 100644
--- a/hw/usb/hcd-ehci.c
+++ b/hw/usb/hcd-ehci.c
@@ -2298,10 +2298,10 @@ static void ehci_frame_timer(void *opaque)
/* If we've raised int, we speed up the timer, so that we quickly
* notice any new packets queued up in response */
if (ehci->int_req_by_async && (ehci->usbsts & USBSTS_INT)) {
- expire_time = t_now + get_ticks_per_sec() / (FRAME_TIMER_FREQ * 4);
+ expire_time = t_now + NSEC_PER_SEC / (FRAME_TIMER_FREQ * 4);
ehci->int_req_by_async = false;
} else {
- expire_time = t_now + (get_ticks_per_sec()
+ expire_time = t_now + (NSEC_PER_SEC
* (ehci->async_stepdown+1) / FRAME_TIMER_FREQ);
}
timer_mod(ehci->frame_timer, expire_time);
diff --git a/hw/usb/hcd-musb.c b/hw/usb/hcd-musb.c
index 61cc878..fc5bb7a 100644
--- a/hw/usb/hcd-musb.c
+++ b/hw/usb/hcd-musb.c
@@ -563,7 +563,7 @@ static void musb_schedule_cb(USBPort *port, USBPacket
*packey)
ep->intv_timer[dir] = timer_new_ns(QEMU_CLOCK_VIRTUAL, musb_cb_tick,
ep);
timer_mod(ep->intv_timer[dir], qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- muldiv64(timeout, get_ticks_per_sec(), 8000));
+ muldiv64(timeout, NSEC_PER_SEC, 8000));
}
static int musb_timeout(int ttype, int speed, int val)
diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c
index 1a22c9c..df388a3 100644
--- a/hw/usb/hcd-ohci.c
+++ b/hw/usb/hcd-ohci.c
@@ -1839,12 +1839,12 @@ static void usb_ohci_init(OHCIState *ohci, DeviceState
*dev,
if (usb_frame_time == 0) {
#ifdef OHCI_TIME_WARP
- usb_frame_time = get_ticks_per_sec();
- usb_bit_time = muldiv64(1, get_ticks_per_sec(), USB_HZ/1000);
+ usb_frame_time = NSEC_PER_SEC;
+ usb_bit_time = muldiv64(1, NSEC_PER_SEC, USB_HZ/1000);
#else
- usb_frame_time = muldiv64(1, get_ticks_per_sec(), 1000);
- if (get_ticks_per_sec() >= USB_HZ) {
- usb_bit_time = muldiv64(1, get_ticks_per_sec(), USB_HZ);
+ usb_frame_time = muldiv64(1, NSEC_PER_SEC, 1000);
+ if (NSEC_PER_SEC >= USB_HZ) {
+ usb_bit_time = muldiv64(1, NSEC_PER_SEC, USB_HZ);
} else {
usb_bit_time = 1;
}
diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c
index 327f26d..76de0cf 100644
--- a/hw/usb/hcd-uhci.c
+++ b/hw/usb/hcd-uhci.c
@@ -398,7 +398,7 @@ static int uhci_post_load(void *opaque, int version_id)
if (version_id < 2) {
s->expire_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- (get_ticks_per_sec() / FRAME_TIMER_FREQ);
+ (NSEC_PER_SEC / FRAME_TIMER_FREQ);
}
return 0;
}
@@ -440,7 +440,7 @@ static void uhci_port_write(void *opaque, hwaddr addr,
/* start frame processing */
trace_usb_uhci_schedule_start();
s->expire_time = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- (get_ticks_per_sec() / FRAME_TIMER_FREQ);
+ (NSEC_PER_SEC / FRAME_TIMER_FREQ);
timer_mod(s->frame_timer, s->expire_time);
s->status &= ~UHCI_STS_HCHALTED;
} else if (!(val & UHCI_CMD_RS)) {
@@ -1116,7 +1116,7 @@ static void uhci_frame_timer(void *opaque)
UHCIState *s = opaque;
uint64_t t_now, t_last_run;
int i, frames;
- const uint64_t frame_t = get_ticks_per_sec() / FRAME_TIMER_FREQ;
+ const uint64_t frame_t = NSEC_PER_SEC / FRAME_TIMER_FREQ;
s->completions_only = false;
qemu_bh_cancel(s->bh);
diff --git a/hw/watchdog/wdt_i6300esb.c b/hw/watchdog/wdt_i6300esb.c
index b2d158f..668bb49 100644
--- a/hw/watchdog/wdt_i6300esb.c
+++ b/hw/watchdog/wdt_i6300esb.c
@@ -126,7 +126,7 @@ static void i6300esb_restart_timer(I6300State *d, int stage)
timeout <<= 5;
/* Get the timeout in units of ticks_per_sec. */
- timeout = get_ticks_per_sec() * timeout / 33000000;
+ timeout = NSEC_PER_SEC * timeout / 33000000;
i6300esb_debug("stage %d, timeout %" PRIi64 "\n", d->stage, timeout);
diff --git a/hw/watchdog/wdt_ib700.c b/hw/watchdog/wdt_ib700.c
index 0917a71..ea783ff 100644
--- a/hw/watchdog/wdt_ib700.c
+++ b/hw/watchdog/wdt_ib700.c
@@ -63,7 +63,7 @@ static void ib700_write_enable_reg(void *vp, uint32_t addr,
uint32_t data)
ib700_debug("addr = %x, data = %x\n", addr, data);
- timeout = (int64_t) time_map[data & 0xF] * get_ticks_per_sec();
+ timeout = (int64_t) time_map[data & 0xF] * NSEC_PER_SEC;
timer_mod(s->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + timeout);
}
diff --git a/include/hw/acpi/acpi.h b/include/hw/acpi/acpi.h
index 1f678b4..ada3af1 100644
--- a/include/hw/acpi/acpi.h
+++ b/include/hw/acpi/acpi.h
@@ -149,7 +149,7 @@ void acpi_pm_tmr_reset(ACPIREGS *ar);
static inline int64_t acpi_pm_tmr_get_clock(void)
{
return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), PM_TIMER_FREQUENCY,
- get_ticks_per_sec());
+ NSEC_PER_SEC);
}
/* PM1a_EVT: piix and ich9 don't implement PM1b. */
diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index e5bd494..858e749 100644
--- a/include/qemu/timer.h
+++ b/include/qemu/timer.h
@@ -782,10 +782,7 @@ void cpu_enable_ticks(void);
/* Caller must hold BQL */
void cpu_disable_ticks(void);
-static inline int64_t get_ticks_per_sec(void)
-{
- return 1000000000LL;
-}
+#define NSEC_PER_SEC 1000000000LL
/*
* Low level clock functions
@@ -810,7 +807,7 @@ static inline int64_t get_clock(void)
{
LARGE_INTEGER ti;
QueryPerformanceCounter(&ti);
- return muldiv64(ti.QuadPart, get_ticks_per_sec(), clock_freq);
+ return muldiv64(ti.QuadPart, NSEC_PER_SEC, clock_freq);
}
#else
diff --git a/monitor.c b/monitor.c
index 68873ec..1e4f34e 100644
--- a/monitor.c
+++ b/monitor.c
@@ -1978,9 +1978,9 @@ int64_t dev_time;
static void hmp_info_profile(Monitor *mon, const QDict *qdict)
{
monitor_printf(mon, "async time %" PRId64 " (%0.3f)\n",
- dev_time, dev_time / (double)get_ticks_per_sec());
+ dev_time, dev_time / (double)NSEC_PER_SEC);
monitor_printf(mon, "qemu time %" PRId64 " (%0.3f)\n",
- tcg_time, tcg_time / (double)get_ticks_per_sec());
+ tcg_time, tcg_time / (double)NSEC_PER_SEC);
tcg_time = 0;
dev_time = 0;
}
diff --git a/net/dump.c b/net/dump.c
index 9d3a09e..12dc184 100644
--- a/net/dump.c
+++ b/net/dump.c
@@ -69,7 +69,7 @@ static ssize_t dump_receive(NetClientState *nc, const uint8_t
*buf, size_t size)
return size;
}
- ts = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 1000000,
get_ticks_per_sec());
+ ts = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 1000000,
NSEC_PER_SEC);
caplen = size > s->pcap_caplen ? s->pcap_caplen : size;
hdr.ts.tv_sec = ts / 1000000 + s->start_ts;
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 10886c5..504530a 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -649,7 +649,7 @@ void pmccntr_sync(CPUARMState *env)
uint64_t temp_ticks;
temp_ticks = muldiv64(qemu_clock_get_us(QEMU_CLOCK_VIRTUAL),
- get_ticks_per_sec(), 1000000);
+ NSEC_PER_SEC, 1000000);
if (env->cp15.c9_pmcr & PMCRD) {
/* Increment once every 64 processor clock cycles */
@@ -688,7 +688,7 @@ static uint64_t pmccntr_read(CPUARMState *env, const
ARMCPRegInfo *ri)
}
total_ticks = muldiv64(qemu_clock_get_us(QEMU_CLOCK_VIRTUAL),
- get_ticks_per_sec(), 1000000);
+ NSEC_PER_SEC, 1000000);
if (env->cp15.c9_pmcr & PMCRD) {
/* Increment once every 64 processor clock cycles */
@@ -709,7 +709,7 @@ static void pmccntr_write(CPUARMState *env, const
ARMCPRegInfo *ri,
}
total_ticks = muldiv64(qemu_clock_get_us(QEMU_CLOCK_VIRTUAL),
- get_ticks_per_sec(), 1000000);
+ NSEC_PER_SEC, 1000000);
if (env->cp15.c9_pmcr & PMCRD) {
/* Increment once every 64 processor clock cycles */
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index 12328a4..0b10f8c 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -1262,7 +1262,7 @@ void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
/* Always wake up soon in case the interrupt was level based */
timer_mod(idle_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- (get_ticks_per_sec() / 50));
+ (NSEC_PER_SEC / 50));
}
/* We don't know if there are more interrupts pending after this. However,
@@ -1716,7 +1716,7 @@ uint32_t kvmppc_get_tbfreq(void)
{
char line[512];
char *ns;
- uint32_t retval = get_ticks_per_sec();
+ uint32_t retval = NSEC_PER_SEC;
if (read_cpuinfo("timebase", line, sizeof(line))) {
return retval;
diff --git a/target-ppc/kvm_ppc.c b/target-ppc/kvm_ppc.c
index f769acd..f22d6eb 100644
--- a/target-ppc/kvm_ppc.c
+++ b/target-ppc/kvm_ppc.c
@@ -34,7 +34,7 @@ void kvmppc_init(void)
* an idle guest does no IO, qemu's device model will never get a chance to
* run. So, until QEMU gains IO threads, we create this timer to ensure
* that the device model gets a chance to run. */
- kvmppc_timer_rate = get_ticks_per_sec() / 10;
+ kvmppc_timer_rate = NSEC_PER_SEC / 10;
kvmppc_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &kvmppc_timer_hack, NULL);
timer_mod(kvmppc_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
kvmppc_timer_rate);
}
--
1.9.1
