On Mon, 2015-03-30 at 11:21 +0000, WGH wrote: > Public bug reported: > > http://cache.freescale.com/files/32bit/doc/ref_manual/E500CORERM.pdf - see > 2.12.5.2 MAS Register 1 (MAS1), p. 2-41 > http://cache.freescale.com/files/32bit/doc/ref_manual/E500MCRM.pdf - see > 2.16.6.2 MAS Register 1 (MAS1), p. 2-54 > > According to these documents, variable page size for TLB1 is computed as > 4K ** TSIZE. > > However, QEMU always treats it as if it was 1K << TSIZE, even if options > like "-cpu e500mc" are supplied to qemu.
MMU v2 (implemented in e6500) extended the TSIZE field so that 1K << TSIZE is correct. The extension was on the LSB side so that it works fine as long as the low bit of the new TSIZE (which is reserved on e500v2/mc) is zero. -Scott
