I've included both the changes to the core memory system code and the target-arm changes as a usage example, but the ARM stuff is all at the end of the series, so if we want to split it and take it via separate subtrees that's fine.
There are not many changes between v1 and v2 here: Changes v1->v2: * patch 2 : remove io_mem_read/write entirely as suggested by Paolo * moved watchpoint patch earlier in the series * added a comment that the guest-cpu-endianness access fns are deprecated outside target-* * use struct with bitfields rather than manual logic ops (this has meant minor changes to some of the later patches, but I retained reviewed-by tags because I didn't think the changes were significant enough to need removing them) I believe this code contains enough changes that all the memory transactions issued by the ARM CPU will correctly be marked as S or NS. Obviously nothing currently pays attention to this, but the patches to make the GIC model support TrustZone can be easily wired up to this. thanks -- PMM Peter Maydell (14): memory: Define API for MemoryRegionOps to take attrs and return status memory: Replace io_mem_read/write with memory_region_dispatch_read/write Make CPU iotlb a structure rather than a plain hwaddr Add MemTxAttrs to the IOTLB exec.c: Convert subpage memory ops to _with_attrs exec.c: Make address_space_rw take transaction attributes exec.c: Add new address_space_ld*/st* functions exec.c: Capture the memory attributes for a watchpoint hit Switch non-CPU callers from ld/st*_phys to address_space_ld/st* target-arm: Honour NS bits in page tables target-arm: Use correct memory attributes for page table walks target-arm: Add user-mode transaction attribute target-arm: Use attribute info to handle user-only watchpoints target-arm: Check watchpoints against CPU security state cputlb.c | 22 +- dma-helpers.c | 3 +- exec.c | 426 ++++++++++++++++++++++++++++++-------- hw/alpha/dp264.c | 9 +- hw/alpha/typhoon.c | 3 +- hw/arm/boot.c | 6 +- hw/arm/highbank.c | 12 +- hw/dma/pl080.c | 20 +- hw/dma/sun4m_iommu.c | 3 +- hw/i386/intel_iommu.c | 3 +- hw/mips/mips_jazz.c | 6 +- hw/pci-host/apb.c | 3 +- hw/pci-host/prep.c | 6 +- hw/pci/msi.c | 3 +- hw/pci/msix.c | 3 +- hw/s390x/css.c | 19 +- hw/s390x/s390-pci-bus.c | 9 +- hw/s390x/s390-pci-inst.c | 10 +- hw/s390x/s390-virtio-bus.c | 73 ++++--- hw/s390x/s390-virtio.c | 4 +- hw/s390x/virtio-ccw.c | 87 +++++--- hw/sh4/r2d.c | 6 +- hw/timer/hpet.c | 5 +- hw/vfio/pci.c | 18 +- include/exec/cpu-defs.h | 15 +- include/exec/exec-all.h | 7 +- include/exec/memattrs.h | 45 ++++ include/exec/memory.h | 151 +++++++++++++- include/qom/cpu.h | 2 + include/sysemu/dma.h | 3 +- ioport.c | 16 +- kvm-all.c | 3 +- memory.c | 204 +++++++++++------- monitor.c | 3 +- scripts/coverity-model.c | 8 +- softmmu_template.h | 38 ++-- target-arm/helper.c | 129 ++++++++++-- target-arm/op_helper.c | 29 +-- target-i386/arch_memory_mapping.c | 15 +- 39 files changed, 1074 insertions(+), 353 deletions(-) create mode 100644 include/exec/memattrs.h -- 1.9.1