On 04/17/2015 10:55 AM, Pranavkumar Sawargaonkar wrote:
This patch adds routine to route legacy interrupts to VM.
Signed-off-by: Pranavkumar Sawargaonkar <pranavku...@linaro.org>
Signed-off-by: Tushar Jagad <tushar.ja...@linaro.org>
I don't think the device model should have awareness of any global irq
number spaces. Can you move this into the board model instead? Then you
also don't need the first patch.
Alex
---
hw/pci-host/gpex.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c
index 9d8fb5a..35842e4 100644
--- a/hw/pci-host/gpex.c
+++ b/hw/pci-host/gpex.c
@@ -42,6 +42,17 @@ static void gpex_set_irq(void *opaque, int irq_num, int
level)
qemu_set_irq(s->irq[irq_num], level);
}
+static PCIINTxRoute gpex_route_intx_pin_to_irq(void *opaque, int pin)
+{
+ PCIINTxRoute route;
+ GPEXHost *s = opaque;
+
+ route.mode = PCI_INTX_ENABLED;
+ route.irq = qemu_get_irq_num(s->irq[pin]);
+
+ return route;
+}
+
static void gpex_host_realize(DeviceState *dev, Error **errp)
{
PCIHostState *pci = PCI_HOST_BRIDGE(dev);
@@ -66,6 +77,7 @@ static void gpex_host_realize(DeviceState *dev, Error **errp)
&s->io_ioport, 0, 4, TYPE_PCIE_BUS);
qdev_set_parent_bus(DEVICE(&s->gpex_root), BUS(pci->bus));
+ pci_bus_set_route_irq_fn(pci->bus, gpex_route_intx_pin_to_irq);
qdev_init_nofail(DEVICE(&s->gpex_root));
}
