This patch set adds support for misaligned memory accesses in MIPS architecture Release 6 and MIPS SIMD Architecture.
The behaviour, semantics, and architecture specifications of misaligned memory accesses are described in: MIPS Architecture For Programmers Volume I-A: Introduction to the MIPS64 Architecture, Appendix B Misaligned Memory Accesses. Available at http://www.imgtec.com/mips/architectures/mips64.asp Regards, Yongbok Yongbok Kim (3): softmmu: Add size argument to do_unaligned_access() target-mips: Misaligned Memory Accesses for R6 target-mips: Misaligned Memory Accesses for MSA include/qom/cpu.h | 7 +++-- softmmu_template.h | 24 +++++++++++----------- target-alpha/cpu-qom.h | 3 +- target-alpha/mem_helper.c | 3 +- target-mips/cpu-qom.h | 3 +- target-mips/cpu.h | 2 + target-mips/helper.c | 36 +++++++++++++++++++++++++++++++++ target-mips/op_helper.c | 45 +++++++++++++++++++++++++++++++++++++++++- target-mips/translate_init.c | 2 +- target-sparc/cpu-qom.h | 3 +- target-sparc/ldst_helper.c | 3 +- target-xtensa/cpu-qom.h | 3 +- target-xtensa/op_helper.c | 2 +- 13 files changed, 112 insertions(+), 24 deletions(-) -- 1.7.5.4
