On Fri, Apr 24, 2015 at 01:28:47PM -0700, Peter Crosthwaite wrote: > Create a new header for Cadence UART to allow using the device with > modern SoC programming conventions. The state struct needs to be > visible to embed the device in SoC containers. > > Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> > Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.igles...@xilinx.com> > Tested-by: Alistair Francis <alistair.fran...@xilinx.com> > Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com> > --- > changed since v4 (PMM review): > remove include guard _ > Add (c) info to header > Make commit msg body standalone > changed since v1: > Fix /* Public */ comment spacing (Alistair review) > > hw/char/cadence_uart.c | 29 +---------------------- > include/hw/char/cadence_uart.h | 53 > ++++++++++++++++++++++++++++++++++++++++++ > 2 files changed, 54 insertions(+), 28 deletions(-) > create mode 100644 include/hw/char/cadence_uart.h > > diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c > index 4a4d3eb..9d379e5 100644 > --- a/hw/char/cadence_uart.c > +++ b/hw/char/cadence_uart.c > @@ -16,9 +16,7 @@ > * with this program; if not, see <http://www.gnu.org/licenses/>. > */ > > -#include "hw/sysbus.h" > -#include "sysemu/char.h" > -#include "qemu/timer.h" > +#include "hw/char/cadence_uart.h" > > #ifdef CADENCE_UART_ERR_DEBUG > #define DB_PRINT(...) do { \ > @@ -85,8 +83,6 @@ > #define LOCAL_LOOPBACK (0x2 << UART_MR_CHMODE_SH) > #define REMOTE_LOOPBACK (0x3 << UART_MR_CHMODE_SH) > > -#define CADENCE_UART_RX_FIFO_SIZE 16 > -#define CADENCE_UART_TX_FIFO_SIZE 16 > #define UART_INPUT_CLK 50000000 > > #define R_CR (0x00/4) > @@ -108,29 +104,6 @@ > #define R_PWID (0x40/4) > #define R_TTRIG (0x44/4) > > -#define CADENCE_UART_R_MAX (0x48/4) > - > -#define TYPE_CADENCE_UART "cadence_uart" > -#define CADENCE_UART(obj) OBJECT_CHECK(CadenceUARTState, (obj), \ > - TYPE_CADENCE_UART) > - > -typedef struct { > - /*< private >*/ > - SysBusDevice parent_obj; > - /*< public >*/ > - > - MemoryRegion iomem; > - uint32_t r[CADENCE_UART_R_MAX]; > - uint8_t rx_fifo[CADENCE_UART_RX_FIFO_SIZE]; > - uint8_t tx_fifo[CADENCE_UART_TX_FIFO_SIZE]; > - uint32_t rx_wpos; > - uint32_t rx_count; > - uint32_t tx_count; > - uint64_t char_tx_time; > - CharDriverState *chr; > - qemu_irq irq; > - QEMUTimer *fifo_trigger_handle; > -} CadenceUARTState; > > static void uart_update_status(CadenceUARTState *s) > { > diff --git a/include/hw/char/cadence_uart.h b/include/hw/char/cadence_uart.h > new file mode 100644 > index 0000000..6310f52 > --- /dev/null > +++ b/include/hw/char/cadence_uart.h > @@ -0,0 +1,53 @@ > +/* > + * Device model for Cadence UART > + * > + * Copyright (c) 2010 Xilinx Inc. > + * Copyright (c) 2012 Peter A.G. Crosthwaite > (peter.crosthwa...@petalogix.com) > + * Copyright (c) 2012 PetaLogix Pty Ltd. > + * Written by Haibing Ma > + * M.Habib > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License > + * as published by the Free Software Foundation; either version > + * 2 of the License, or (at your option) any later version. > + * > + * You should have received a copy of the GNU General Public License along > + * with this program; if not, see <http://www.gnu.org/licenses/>. > + */ > + > +#ifndef CADENCE_UART_H > + > +#include "hw/sysbus.h" > +#include "sysemu/char.h" > +#include "qemu/timer.h" > + > +#define CADENCE_UART_RX_FIFO_SIZE 16 > +#define CADENCE_UART_TX_FIFO_SIZE 16 > + > +#define CADENCE_UART_R_MAX (0x48/4) > + > +#define TYPE_CADENCE_UART "cadence_uart" > +#define CADENCE_UART(obj) OBJECT_CHECK(CadenceUARTState, (obj), \ > + TYPE_CADENCE_UART) > + > +typedef struct { > + /*< private >*/ > + SysBusDevice parent_obj; > + > + /*< public >*/ > + MemoryRegion iomem; > + uint32_t r[CADENCE_UART_R_MAX]; > + uint8_t rx_fifo[CADENCE_UART_RX_FIFO_SIZE]; > + uint8_t tx_fifo[CADENCE_UART_TX_FIFO_SIZE]; > + uint32_t rx_wpos; > + uint32_t rx_count; > + uint32_t tx_count; > + uint64_t char_tx_time; > + CharDriverState *chr; > + qemu_irq irq; > + QEMUTimer *fifo_trigger_handle; > +} CadenceUARTState; > + > +#define CADENCE_UART_H > +#endif > -- > 2.3.6.3.g2cc70ee >