Migrate the target_disas TARGET_CRIS code to common code, so that the disassambly works for the monitor (as well the log).
E.g. (qemu) xp 0x40004000 0000000040004000: 0x1e6f25f0 And before this patch: (qemu) xp/i 0x40004000 0x40004000: Asm output not supported on this arch After: (qemu) xp/i 0x40004000 0x40004000: di (qemu) xp/i 0x40004002 0x40004002: move.d 0xb003c004,$r1 Note: second example is 6-byte misaligned instruction! Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> --- disas.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/disas.c b/disas.c index 2ffef58..498b05f 100644 --- a/disas.c +++ b/disas.c @@ -236,6 +236,14 @@ target_disas_set_info(int (**print_insn)(bfd_vma pc, disassemble_info *info), #elif defined(TARGET_MICROBLAZE) s->info.mach = bfd_arch_microblaze; *print_insn = print_insn_microblaze; +#elif defined(TARGET_CRIS) + if (flags != 32) { + s->info.mach = bfd_mach_cris_v0_v10; + *print_insn = print_insn_crisv10; + } else { + s->info.mach = bfd_mach_cris_v32; + *print_insn = print_insn_crisv32; + } #endif } @@ -303,14 +311,6 @@ void target_disas(FILE *out, CPUArchState *env, target_ulong code, #elif defined(TARGET_ALPHA) s.info.mach = bfd_mach_alpha_ev6; print_insn = print_insn_alpha; -#elif defined(TARGET_CRIS) - if (flags != 32) { - s.info.mach = bfd_mach_cris_v0_v10; - print_insn = print_insn_crisv10; - } else { - s.info.mach = bfd_mach_cris_v32; - print_insn = print_insn_crisv32; - } #endif if (print_insn == NULL) { print_insn = print_insn_od_target; -- 1.9.1