This patch set adds support for misaligned memory accesses in MIPS architecture Release 6 and MIPS SIMD Architecture.
The behaviour, semantics, and architecture specifications of misaligned memory accesses are described in: MIPS Architecture For Programmers Volume I-A: Introduction to the MIPS64 Architecture, Appendix B Misaligned Memory Accesses. Available at http://www.imgtec.com/mips/architectures/mips64.asp Regards, Yongbok v2: * Removed re-translation in the mips_cpu_do_unaligned_access() (Peter) * Checks validity only if an access is spanning into two pages in MSA (Leon) * Introduced misaligned flag to indicate MSA ld/st is ongoing, is used to allow misaligned accesses in the mips_cpu_do_unaligned_access() callback. This is crucial to support MSA misaligned accesses in Release 5 cores. Yongbok Kim (2): target-mips: Misaligned memory accesses for R6 target-mips: Misaligned memory accesses for MSA target-mips/cpu.h | 5 +++ target-mips/helper.c | 33 ++++++++++++++++++ target-mips/op_helper.c | 74 ++++++++++++++++++++++++++++++++--------- target-mips/translate.c | 4 ++ target-mips/translate_init.c | 2 +- 5 files changed, 100 insertions(+), 18 deletions(-) -- 1.7.5.4
