From: Victor CLEMENT <victor.clem...@openwide.fr> The masked interrupt status register should be the state of the interrupt after masking. There should be a logical AND instead of a logical OR between the interrupt status and the interrupt mask.
Signed-off-by: Victor CLEMENT <victor.clem...@openwide.fr> Reviewed-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com> Message-id: 1433154824-6927-1-git-send-email-victor.clem...@openwide.fr Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> --- hw/gpio/pl061.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/gpio/pl061.c b/hw/gpio/pl061.c index bd03e99..4ba730b 100644 --- a/hw/gpio/pl061.c +++ b/hw/gpio/pl061.c @@ -173,7 +173,7 @@ static uint64_t pl061_read(void *opaque, hwaddr offset, case 0x414: /* Raw interrupt status */ return s->istate; case 0x418: /* Masked interrupt status */ - return s->istate | s->im; + return s->istate & s->im; case 0x420: /* Alternate function select */ return s->afsel; case 0x500: /* 2mA drive */ -- 1.9.1