On Tue, Jun 16, 2015 at 06:09:22PM -0700, Peter Crosthwaite wrote: > On Tue, Jun 16, 2015 at 5:54 PM, Edgar E. Iglesias > <edgar.igles...@xilinx.com> wrote: > > On Tue, Jun 16, 2015 at 05:36:19PM -0700, Peter Crosthwaite wrote: > >> Add the 2xCortexR5 CPUs to zynqmp board. They are powered off on reset > >> (this is true of real hardware) by default or selectable as the boot > >> processor. > > > > Hi Peter, > > > > I think it would be good if you could model at least a minimal > > way to release the R5s from reset the "real" way. The R5s are > > not covered by PSCI in real code and not all code uses PSCI, > > in particular not any R5 code. > > > > How would the R5s be useful with upstream with this version? > > Maybe I'm missing something. > > > > You can nominate an R5 instead of A53 as the one non-powered-off cpu > by setting the zynqmp boot-cpu property with -global: > > $ qemu-system-aarch64 -M xlnx-ep108 -m 2048 -nographic -kernel > ./r5_image.elf -global xlnx,zynqmp.boot-cpu="rpu-cpu[0]" > > This works with elf boots.
In that mode, how do I release the A53s (or the other R5)? Will it be either one R5 or the A53s? Cheers, Edgar > > Regards, > Peter > > > Cheers, > > Edgar > > > > > >> > >> Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com> > >> --- > >> changed since v2: > >> Add boot-cpu start-powered-off conditional > >> changed since v1: > >> s/rcpu/rpu-cpu/ > >> > >> hw/arm/xlnx-zynqmp.c | 34 ++++++++++++++++++++++++++++++++++ > >> include/hw/arm/xlnx-zynqmp.h | 2 ++ > >> 2 files changed, 36 insertions(+) > >> > >> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c > >> index 0c966da..5e72078 100644 > >> --- a/hw/arm/xlnx-zynqmp.c > >> +++ b/hw/arm/xlnx-zynqmp.c > >> @@ -71,6 +71,13 @@ static void xlnx_zynqmp_init(Object *obj) > >> &error_abort); > >> } > >> > >> + for (i = 0; i < XLNX_ZYNQMP_NUM_RPU_CPUS; i++) { > >> + object_initialize(&s->rpu_cpu[i], sizeof(s->rpu_cpu[i]), > >> + "cortex-r5-" TYPE_ARM_CPU); > >> + object_property_add_child(obj, "rpu-cpu[*]", > >> OBJECT(&s->rpu_cpu[i]), > >> + &error_abort); > >> + } > >> + > >> object_initialize(&s->gic, sizeof(s->gic), TYPE_ARM_GIC); > >> qdev_set_parent_bus(DEVICE(&s->gic), sysbus_get_default()); > >> > >> @@ -163,6 +170,33 @@ static void xlnx_zynqmp_realize(DeviceState *dev, > >> Error **errp) > >> qdev_connect_gpio_out(DEVICE(&s->apu_cpu[i]), 1, irq); > >> } > >> > >> + for (i = 0; i < XLNX_ZYNQMP_NUM_RPU_CPUS; i++) { > >> + char *name; > >> + > >> + name = > >> object_get_canonical_path_component(OBJECT(&s->rpu_cpu[i])); > >> + if (strcmp(name, boot_cpu)) { > >> + /* Secondary CPUs start in PSCI powered-down state */ > >> + object_property_set_bool(OBJECT(&s->rpu_cpu[i]), true, > >> + "start-powered-off", &error_abort); > >> + } else { > >> + s->boot_cpu_ptr = &s->rpu_cpu[i]; > >> + } > >> + > >> + object_property_set_bool(OBJECT(&s->rpu_cpu[i]), true, > >> "reset-hivecs", > >> + &err); > >> + if (err != NULL) { > >> + error_propagate(errp, err); > >> + return; > >> + } > >> + > >> + object_property_set_bool(OBJECT(&s->rpu_cpu[i]), true, "realized", > >> + &err); > >> + if (err) { > >> + error_propagate((errp), (err)); > >> + return; > >> + } > >> + } > >> + > >> if (!s->boot_cpu_ptr) { > >> error_setg(errp, "ZynqMP Boot cpu %s not found\n", boot_cpu); > >> return; > >> diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h > >> index 4f14a22..c379632 100644 > >> --- a/include/hw/arm/xlnx-zynqmp.h > >> +++ b/include/hw/arm/xlnx-zynqmp.h > >> @@ -28,6 +28,7 @@ > >> TYPE_XLNX_ZYNQMP) > >> > >> #define XLNX_ZYNQMP_NUM_APU_CPUS 4 > >> +#define XLNX_ZYNQMP_NUM_RPU_CPUS 2 > >> #define XLNX_ZYNQMP_NUM_GEMS 4 > >> #define XLNX_ZYNQMP_NUM_UARTS 2 > >> > >> @@ -48,6 +49,7 @@ typedef struct XlnxZynqMPState { > >> > >> /*< public >*/ > >> ARMCPU apu_cpu[XLNX_ZYNQMP_NUM_APU_CPUS]; > >> + ARMCPU rpu_cpu[XLNX_ZYNQMP_NUM_RPU_CPUS]; > >> GICState gic; > >> MemoryRegion gic_mr[XLNX_ZYNQMP_GIC_REGIONS][XLNX_ZYNQMP_GIC_ALIASES]; > >> CadenceGEMState gem[XLNX_ZYNQMP_NUM_GEMS]; > >> -- > >> 2.4.3.3.g905f831 > >> > >