On 4/26/10, Segher Boessenkool <seg...@kernel.crashing.org> wrote: > > > > > It is explained in [e300CORERM] at chapters 5.2.3, 5.5.1.1 and 8.3.3. > > > Clearly, the vector offset is 0x100 and the exception prefix can be 0 or > > > 0xFFF00000, depending of the MSR[IP] bit. > > > > > > So, yes, I'm sure the value of hreset_vector must be 0x100. > > > But hreset_excp_prefix can change. It could be another patch. > > > > > > > Interesting. That's different from 970. > > > > On 970, you can have the same effect (well, more general) by > changing HIOR. > > > > > > > About the prefix initialization, the datasheet says it is "determined by > > > MSR[IP]". and is "determined by the state of the msrip signal". But I > don't > > > understand what is the msrip signal and how MSR[IP] is changed (is it > related > > > to msrip ?). Do you have an explanation for this part ? > > > > > > > Your code can change MSR[IP]; there is also a strapping pin that is > sampled on HRESET (and copied to MSR[IP]).
Wouldn't this mean that when the reset is issued by hardware, MSR[IP] is always 1 (to boot from ROM) but with software reset it can take software defined values? I think now QEMU ignores MSR[IP].
