On 09/07/2015 10:17, Richard Henderson wrote: > + /* ??? Vol 1, 16.5.6 Intel MPX and SMM says that IA32_BNDCFGS > + is saved at offset 7ED0. Vol 3, 34.4.1.1, Table 32-2, has > + 7EA0-7ED7 as "reserved". What's this, and what's really > + supposed to happen? */ > x86_stq_phys(cs, sm_state + 0x7ed0, env->efer);
The format that QEMU (and KVM) are using is based on AMD's format for the state save area. In my copy of the AMD manual this is Table 10-1. Reserved areas in there are 0xfef0-0xfefb and 0xff04-0xff1f. I definitely should update KVM to save/restore BNDCFGS. Thanks for the heads up! Paolo
