On 30/06/2015 14:18, Leon Alrae wrote: > On 29/06/2015 11:20, Andrew Bennett wrote: >> From: Andrew Bennett <andrew.benn...@imgtec.com> >> >> For the MIPS N64 ABI when QEMU reads the break/trap instruction so that >> it can inspect the break/trap code it reads 8 rather than 4 bytes >> which means it finds the code field from the instruction after the >> break/trap instruction. This then causes the break/trap handling >> code to fail because it does not understand the code number. >> >> The fix forces QEMU to always read 4 bytes of instruction data rather >> than deciding how much to read based on the ABI. >> >> Signed-off-by: Andrew Bennett <andrew.benn...@imgtec.com> >> --- >> linux-user/main.c | 4 ++-- >> 1 files changed, 2 insertions(+), 2 deletions(-) > > Reviewed-by: Leon Alrae <leon.al...@imgtec.com>
Riku, I'm including this patch in target-mips queue which I'm going to send out soon for rc1. If you have any objections please let me know. Thanks, Leon