On Mon, Jul 20, 2015 at 01:53:13PM +0300, Efimov Vasily wrote: > This patch improves PAM emulation. > > PAM defines 4 memory access redirection modes. In mode 1 reads are directed to > RAM and writes are directed to PCI. In mode 2 it is contrary. In mode 0 all > access is directed to PCI. In mode 3 it is directed to RAM. Currently all > modes > are emulated using aliases. It is good for modes 0 and 3 but modes 1 and 2 > require more complicated logic. Present API has not needed region type.
Hi, Is the motivation of this patch to improve the correctness of the hardware emulation or is there some feature that the current QEMU implementation prevents? There has been some interest recently in making SeaBIOS boot faster on QEMU and the shadow ram fixups in SeaBIOS have been shown to consume a notable amount of bootup time (~12ms on my machine). Will changing the PAM support improve overall boot times? I wonder if going from "mode 0" -> "mode 2" -> "mode 3" would be more expensive than the current SeaBIOS "mode 0" -> "mode 3" mechanism. Also note that SeaBIOS would still need to copy from the high memory location even if the PAM registers were fully implemented as SeaBIOS often exceeds 128K - the "mode 2" overwrite oneself trick would only work for the last 128K of the rom. Thanks, -Kevin
