On Thu, Jul 23, 2015 at 02:35:05PM +0100, Peter Maydell wrote: > On 23 July 2015 at 14:13, Laszlo Ersek <ler...@redhat.com> wrote: > > On 07/22/15 19:18, Kevin O'Connor wrote: > >> Another possibility would be to place the new fw_cfg dma register > >> address into a named fw_cfg "file" (eg, "fw_cfg_dma"). The firmware > >> could then use the existing select/data fw_cfg interface to check if > >> the new dma interface is available by scanning for that "fw_cfg_dma" > >> file. This has the advantage of not requiring a new "magic address", > >> but has the disadvantage of a more complex probe. > > > > I like this one so much that I'm worried I'm missing some details. :) > > This requires the device itself to know its own address, which > is in QEMU possible but ugly enough to be worth avoiding. > > For ARM MMIO the obvious answer is "the new register should > just go next to the first one". Does x86 do something that > means we can't put it somewhere equally straightforward > or do discovery via whatever x86 uses for discovering MMIO?
On x86 the fw_cfg select/data registers are in IO space at address 0x510 and 0x511. I suspect one could put a "transfer descriptor address" register in IO space at 0x514-0x51c (or 0x518-0x520 if alignment is a concern, or even 0x510-0x518 if willing to play tricks with read/write size). I didn't see any conflicts after a quick search - does anyone know if it would be a problem? -Kevin
