On 23 July 2015 at 21:46, Benjamin Herrenschmidt <b...@kernel.crashing.org> wrote: > On Thu, 2015-07-23 at 20:24 +0200, Laurent Vivier wrote: >> From: Michael Roth <mdr...@linux.vnet.ibm.com> >> >> Some kernels program a 0 address for io regions. PCI 3.0 spec >> section 6.2.5.1 doesn't seem to disallow this. >> >> Signed-off-by: Michael Roth <mdr...@linux.vnet.ibm.com> >> [lvivier: add pci_allow_0_addr in MachineClass to conditionally >> allow addr 0 for pseries, as this can break other architectures] >> Signed-off-by: Laurent Vivier <lviv...@redhat.com> >> --- > > Why would it break other architectures ? The PCI bus will forward > address 0 just fine and some devices will decode it just fine too, > regardless of the architecture they are put on. I don't see why > having BARs capable of decoding it would break anything...
Discussion from last time around: http://lists.gnu.org/archive/html/qemu-devel/2015-01/msg01358.html suggests that it's a workaround for our PC model being buggy and putting 0-address BARs over the top of some other system device rather than underneath them... (Also, none of our PCI device models actually try to do the "BAR at zero means I won't respond" behaviour, which presumably they might do in real life.) -- PMM
