On 8/4/15 00:40, Richard Henderson wrote: > On 08/01/2015 02:47 AM, Chen Gang wrote: >> I am just adding floating point instructions (e.g. fsingle_add1), >> but for me, I can not find any details about them (the ISA >> documents only give a summary description, but not details), e.g. > > The tilegx splits the four/six cycle arithmetic into multiple > black-box instructions. You need only really implement one of the > four, with the rest of them being implemented as nops or moves. > > Looking at what gcc produces gives the hints: > > fdouble_unpack_min min, srca, srcb fdouble_unpack_max max, srca, > srcb fdouble_add_flags flg, srca, srcb fdouble_addsub max, > min, flg > fdouble_pack1 dst, max, flg fdouble_pack2 dst, max, zero > > The unpack, addsub, and pack2 insns can be ignored, the add_flags > insn can perform the whole operation, the pack1 insn performs a move > from "flg" to "dst". > > Similarly for the single-precision: > > fsingle_add1 tmp, srca, srcb fsingle_addsub2 tmp, srca, srcb > fsingle_pack1 flg, tmp fsingle_pack2 dst, tmp, flg > > The add1 insn performs the whole operation, the addsub2 and pack1 > insns are ignored, and the pack2 insn is a move from tmp to dst. >
Thank you very much. I am just analyzing the template file (tilegx.md) and testsuite executable file (20000603-1.exe) for it. Your information is really valuable to me! :-) And still welcome any additional information for it: especially related details documentations which should be more 'standard' than the third- party's implementation (e.g. gcc implementation). I shall try to let qemu tilegx support gcc testsuite successfully within this month. Thanks. -- Chen Gang Open, share, and attitude like air, water, and life which God blessed
