On 12 August 2015 at 13:36, Paolo Bonzini <pbonz...@redhat.com> wrote: > > > On 12/08/2015 09:31, alvise rigo wrote: >> I think that tlb_flush_entry is not enough, since in theory another >> vCPU could have a different TLB address referring the same phys >> address. > > You're right, this is a TLB so it's virtually-indexed. :( I'm not sure > what happens on ARM, since it has a virtually indexed (VIVT or VIPT) > cache, but indeed it would be a problem when implementing e.g. CMPXCHG > using the TCG ll/sc ops.
On ARM the exclusives operate on physical addresses, not virtual. -- PMM
