Hi all,
I noticed that ATMU register reads on E500 are broken. Due to the wrong mask,
some registers cannot be read and instead some other registers are read. Please
see attached patch which fixes the problem.
I also noticed that if there was an intention to have 1:1 PCI/CPU space mapping
for 0xC000_0000 for MPC8544DS without programming ATMUs - it does not work,
unless ATMUs are programmed.
Signed-off-by: Rudolf Marek <rudolf.ma...@sysgo.com>
Thanks,
Rudolf
--
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Ing. Rudolf Marek
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>From 75795e2bcc6ffbb245d192eb84e063d855dbf248 Mon Sep 17 00:00:00 2001
From: Rudolf Marek <m...@sysgo.com>
Date: Fri, 14 Aug 2015 13:38:55 +0200
Subject: [PATCH] PPC: e500 pci host: Fix ATMUs register reads
There is a bug in the register mask when reading
the ATMUs registers. As the result some registers
cannot be read, and read is aliased to the other
registers. Fix it.
Signed-off-by: Rudolf Marek <rudolf.ma...@sysgo.com>
---
hw/pci-host/ppce500.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c
index 613ba73..50add34 100644
--- a/hw/pci-host/ppce500.c
+++ b/hw/pci-host/ppce500.c
@@ -140,7 +140,7 @@ static uint64_t pci_reg_read4(void *opaque, hwaddr addr,
case PPCE500_PCI_OW3:
case PPCE500_PCI_OW4:
idx = (addr >> 5) & 0x7;
- switch (addr & 0xC) {
+ switch (addr & 0x1F) {
case PCI_POTAR:
value = pci->pob[idx].potar;
break;
@@ -162,7 +162,7 @@ static uint64_t pci_reg_read4(void *opaque, hwaddr addr,
case PPCE500_PCI_IW2:
case PPCE500_PCI_IW1:
idx = ((addr >> 5) & 0x3) - 1;
- switch (addr & 0xC) {
+ switch (addr & 0x1F) {
case PCI_PITAR:
value = pci->pib[idx].pitar;
break;
--
1.9.1
