> lfence and sfence here serve two purposes: > > 1) Template for other architectures
Ok, this makes sense. > 2) x86 code does sometimes have lfence/sfence (e.g. movntq+sfence), > so I guessed they should remain in the translated code. > If on x86 we always ignore the Write-Combining from the > guest, maybe we could claim the l/sfence pair here is really unnecessary. Yeah, I think it's fair enough to ignore WC and nontemporal stores. > I didn't intend to translate say *all* PPC/ARM load barriers > into lfences when generating x86, which is I think your point. Yeah, it's just that the only gen_op_smp_rmb() you had in the RFC also did not need an lfence. But it seems like we're on the same page. Paolo
