On 29/10/15 17:17, Yongbok Kim wrote: > Correct updating XContext.Region field on mmu exceptions. > If Config3.CTXTC = 0 then the R field of XContext has to be updated > with the value of bits 63..62 of the virtual address upon a TLB > exception. > Also fixed the below line which overs 80 characters. > > Signed-off-by: Yongbok Kim <yongbok....@imgtec.com> > --- > target-mips/helper.c | 7 ++++--- > 1 files changed, 4 insertions(+), 3 deletions(-) > > diff --git a/target-mips/helper.c b/target-mips/helper.c > index 2d86323..b3fe816 100644 > --- a/target-mips/helper.c > +++ b/target-mips/helper.c > @@ -293,9 +293,10 @@ static void raise_mmu_exception(CPUMIPSState *env, > target_ulong address, > (env->CP0_EntryHi & 0xFF) | (address & (TARGET_PAGE_MASK << 1)); > #if defined(TARGET_MIPS64) > env->CP0_EntryHi &= env->SEGMask; > - env->CP0_XContext = (env->CP0_XContext & ((~0ULL) << (env->SEGBITS - > 7))) | > - ((address & 0xC00000000000ULL) >> (55 - > env->SEGBITS)) | > - ((address & ((1ULL << env->SEGBITS) - 1) & > 0xFFFFFFFFFFFFE000ULL) >> 9); > + env->CP0_XContext = > + /* PTEBase */ (env->CP0_XContext & ((~0ULL) << (env->SEGBITS - > 7))) | > + /* R */ (extract64(address, 62, 2) << (env->SEGBITS - 9)) | > + /* BadVPN2 */ (extract64(address, 13, env->SEGBITS - 13) << 4); > #endif > cs->exception_index = exception; > env->error_code = error_code; >
Thanks for cleaning up the XContext calculation. I applied this one as well as SIGRIE and RDHWR patches to the target-mips queue. Regards, Leon