On 30 October 2015 at 11:40, James Hogan <james.ho...@imgtec.com> wrote: > On Fri, Oct 30, 2015 at 12:36:07AM +0000, James Hogan wrote: >> Hi Yongbok, >> >> > + case GCR_GIC_BASE_OFS: >> > + return gcr->gic_base; > > Note also, that this is a read-write register. It starts undefined and > the kernel will write the address it wants it to appear at. The GIC_EN > also resets to 0, and needs setting to 1 by software to enable the GIC > region.
That rather suggests that you want a 'container' type component that has this GCR and the GIC and the CPUs in it, so that the GCR can remap the GIC mmio regions suitably as this register is written. thanks -- PMM
