On 09/11/2015 11:58, Peter Maydell wrote: > On 9 November 2015 at 10:51, Paolo Bonzini <pbonz...@redhat.com> wrote: >> >> >> On 05/11/2015 19:15, Peter Maydell wrote: >>> If we have a secure address space, use it in page table walks: >>> * when doing the physical accesses to read descriptors, >>> make them through the correct address space >>> * when the final result indicates a secure access, pass the >>> correct address space index to tlb_set_page_with_attrs() >>> >>> (The descriptor reads are the only direct physical accesses >>> made in target-arm/ for CPUs which might have TrustZone.) >> >> What is the case where you have no secure address space and you have >> TrustZone? KVM doesn't have TrustZone, so it should never be in a >> secure regime, should it? > > You mean "what is the case where is_secure but cpu->num_ases == 1" ? > That happens if you have a TrustZone CPU but the board has only > connected up one address space, because there is no difference > in the view from Secure and NonSecure. (vexpress is like this > in hardware, and most of our board models for TZ CPUS are like > that now even if the real h/w makes a distinction.) > > I could have handled that by making the CPU init code always > register two ASes (using the same one twice if the board code > only passes one or using system_address_space twice if the > board code doesn't pass one at all), but that seemed a bit wasteful.
I think it's simpler though. Complicating the init code is better than handling the condition throughout all the helpers... Paolo
