It's supposed to be an instruction counter. For now make us not
crash when accessing it.
Signed-off-by: Benjamin Herrenschmidt <b...@kernel.crashing.org>
---
target-ppc/cpu.h | 1 +
target-ppc/translate_init.c | 12 ++++++++++++
2 files changed, 13 insertions(+)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 099b8da..eb94244 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1690,6 +1690,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool
ifetch)
#define SPR_MPC_MD_DBRAM1 (0x32A)
#define SPR_RCPU_L2U_RA3 (0x32B)
#define SPR_TAR (0x32F)
+#define SPR_IC (0x350)
#define SPR_VTB (0x351)
#define SPR_MMCRC (0x353)
#define SPR_440_INV0 (0x370)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index e2efdf3..f3f6cf5 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -8084,6 +8084,17 @@ static void gen_spr_power8_dbell(CPUPPCState *env)
#endif
}
+static void gen_spr_power8_ic(CPUPPCState *env)
+{
+#if !defined(CONFIG_USER_ONLY)
+ spr_register_hv(env, SPR_IC, "IC",
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_generic, SPR_NOACCESS,
+ &spr_read_generic, &spr_write_generic,
+ 0);
+#endif
+}
+
static void init_proc_book3s_64(CPUPPCState *env, int version)
{
gen_spr_ne_601(env);
@@ -8137,6 +8148,7 @@ static void init_proc_book3s_64(CPUPPCState *env, int
version)
gen_spr_vtb(env);
gen_spr_power8_rpr(env);
gen_spr_power8_dbell(env);
+ gen_spr_power8_ic(env);
}
if (version < BOOK3S_CPU_POWER8) {
gen_spr_book3s_dbg(env);
--
2.5.0
