Signed-off-by: Richard Henderson <r...@twiddle.net> --- tcg/s390/tcg-target.c | 28 ++++++++++++++++++++++++---- 1 files changed, 24 insertions(+), 4 deletions(-)
diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c index 2a9d64d..1bc9b4c 100644 --- a/tcg/s390/tcg-target.c +++ b/tcg/s390/tcg-target.c @@ -51,6 +51,8 @@ typedef enum S390Opcode { RIL_LGFI = 0xc001, RIL_LLIHF = 0xc00e, RIL_LLILF = 0xc00f, + RIL_MSFI = 0xc201, + RIL_MSGFI = 0xc200, RIL_NIHF = 0xc00a, RIL_NILF = 0xc00b, RIL_OIHF = 0xc00c, @@ -68,6 +70,8 @@ typedef enum S390Opcode { RI_LLIHL = 0xa50d, RI_LLILH = 0xa50e, RI_LLILL = 0xa50f, + RI_MGHI = 0xa70d, + RI_MHI = 0xa70c, RI_NIHH = 0xa504, RI_NIHL = 0xa505, RI_NILH = 0xa506, @@ -1227,10 +1231,26 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, break; case INDEX_op_mul_i32: - tcg_out_insn(s, RRE, MSR, args[0], args[2]); + if (const_args[2]) { + if (args[2] == (int16_t)args[2]) { + tcg_out_insn(s, RI, MHI, args[0], args[2]); + } else { + tcg_out_insn(s, RIL, MSFI, args[0], args[2]); + } + } else { + tcg_out_insn(s, RRE, MSR, args[0], args[2]); + } break; case INDEX_op_mul_i64: - tcg_out_insn(s, RRE, MSGR, args[0], args[2]); + if (const_args[2]) { + if (args[2] == (int16_t)args[2]) { + tcg_out_insn(s, RI, MGHI, args[0], args[2]); + } else { + tcg_out_insn(s, RIL, MSGFI, args[0], args[2]); + } + } else { + tcg_out_insn(s, RRE, MSGR, args[0], args[2]); + } break; case INDEX_op_div2_i32: @@ -1463,7 +1483,7 @@ static const TCGTargetOpDef s390_op_defs[] = { { INDEX_op_add_i32, { "r", "0", "ri" } }, { INDEX_op_sub_i32, { "r", "0", "ri" } }, - { INDEX_op_mul_i32, { "r", "0", "r" } }, + { INDEX_op_mul_i32, { "r", "0", "ri" } }, { INDEX_op_div2_i32, { "b", "a", "0", "1", "r" } }, { INDEX_op_divu2_i32, { "b", "a", "0", "1", "r" } }, @@ -1524,7 +1544,7 @@ static const TCGTargetOpDef s390_op_defs[] = { { INDEX_op_add_i64, { "r", "0", "rI" } }, { INDEX_op_sub_i64, { "r", "0", "rJ" } }, - { INDEX_op_mul_i64, { "r", "0", "r" } }, + { INDEX_op_mul_i64, { "r", "0", "rI" } }, { INDEX_op_div2_i64, { "b", "a", "0", "1", "r" } }, { INDEX_op_divu2_i64, { "b", "a", "0", "1", "r" } }, -- 1.7.0.1