Allow each architecture to set the exclusive range at any LoadLink operation through a CPUClass hook. This comes in handy to emulate, for instance, the exclusive monitor implemented in some ARM architectures (more precisely, the Exclusive Reservation Granule).
Suggested-by: Jani Kokkonen <jani.kokko...@huawei.com> Suggested-by: Claudio Fontana <claudio.font...@huawei.com> Signed-off-by: Alvise Rigo <a.r...@virtualopensystems.com> --- include/qom/cpu.h | 4 ++++ qom/cpu.c | 7 +++++++ 2 files changed, 11 insertions(+) diff --git a/include/qom/cpu.h b/include/qom/cpu.h index c6bb6b6..9e409ce 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -175,6 +175,10 @@ typedef struct CPUClass { void (*cpu_exec_exit)(CPUState *cpu); bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request); + /* Atomic instruction handling */ + void (*cpu_set_excl_protected_range)(CPUState *cpu, hwaddr addr, + hwaddr size); + void (*disas_set_info)(CPUState *cpu, disassemble_info *info); } CPUClass; diff --git a/qom/cpu.c b/qom/cpu.c index fb80d13..a5c25a8 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -203,6 +203,12 @@ static bool cpu_common_exec_interrupt(CPUState *cpu, int int_req) return false; } +static void cpu_common_set_excl_range(CPUState *cpu, hwaddr addr, hwaddr size) +{ + cpu->excl_protected_range.begin = addr; + cpu->excl_protected_range.end = addr + size; +} + void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags) { @@ -355,6 +361,7 @@ static void cpu_class_init(ObjectClass *klass, void *data) k->cpu_exec_enter = cpu_common_noop; k->cpu_exec_exit = cpu_common_noop; k->cpu_exec_interrupt = cpu_common_exec_interrupt; + k->cpu_set_excl_protected_range = cpu_common_set_excl_range; dc->realize = cpu_common_realizefn; /* * Reason: CPUs still need special care by board code: wiring up -- 2.6.4