On 7 January 2016 at 15:53, Lorenzo Pieralisi <lorenzo.pieral...@arm.com> wrote:
> On Thu, Jan 07, 2016 at 01:25:35PM +0000, Peter Maydell wrote:
>> We had previously been relying on the kernel not attempting to
>> touch the PMU if the ID_AA64DFR0_EL1 PMUVer bits read 0000
>> ("Performance Monitors extension System registers not implemented").
>
> Ok, thanks for looking into this. I wonder why reading pmcr_el0 does
> not suffer from the same problem though.Just a pragmatic thing on QEMU's end, I expect -- the kernel already touched PMCR_EL0 and we wanted to be able to boot it, so we have an implementation of it. thanks -- PMM
