On 3 February 2016 at 13:38, Peter Maydell <peter.mayd...@linaro.org> wrote: > This series fixes a couple more minor EL3 related missing parts, > and then turns on EL3 for AArch64 CPUs. The minor fixed things are: > * implement MDCR_EL3 and SDCR > * trap Secure EL1 accesses to SCR and MVBAR to EL3 > * add EL3 support to the code that decides whether to generate > debug exceptions > * fix corner cases in our NSACR handling > > To do the NSACR fix I had to change the CPAccessFn API to take > an extra bool to tell the function if the access is a read or write. > > The only major thing I know of that we're missing for 64-bit EL3 > is that we need to go through the "EL3 configurable controls" section > of the ARM ARM to make sure we trap on the right things. But > (a) I expect we're missing some for 32-bit as well and (b) this > is enough to run some real-world EL3 code (ARM Trusted Firmware > and OP-TEE), so it makes sense to me to turn on EL3 now.
Applied to target-arm.next with some very minor tweaks to patch 2 (add .resetvalue = 0 to the MDCR_EL3 regdef, add a line to the comment.) thanks -- PMM
