On 06/12/2010 05:04 AM, Aurelien Jarno wrote:
>> + for (i = 0; i < 4; i++) {
>> + tcg_target_long mask = 0xffffull << i*16;
>> + if ((uval & mask) != 0 && (uval & ~mask) == 0) {
>
> Wouldn't it be simpler to use (uval & mask) == uval ?
Doh.
>> + /* Try for PC-relative address load. */
>> + if ((sval & 1) == 0) {
>> + intptr_t off = (sval - (intptr_t)s->code_ptr) >> 1;
>> + if (off == (int32_t)off) {
>> + tcg_out_insn(s, RIL, LARL, ret, off);
>> + return;
>> + }
>> + }
>
> Is this part used in practice? There was such a trick on the ARM
> backend, but it was actually never used.
Yes. The difference here is we have a +- 4GB displacement.
This is primarily used when the extended-immediate facility is not present;
we can generate all even 32-bit constants from LARL, given the placement of
the code_gen_buffer.
r~
