The following changes since commit 4d1e324b2241017c92d816ec3af51a14685dbf62:
Merge remote-tracking branch 'remotes/lalrae/tags/mips-20160226' into staging (2016-02-26 12:54:22 +0000) are available in the git repository at: git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20160226 for you to fetch changes up to e20d84c1407d43d5a2e2ac95dbb46db3b0af8f9f: target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEF (2016-02-26 15:09:42 +0000) ---------------------------------------------------------------- target-arm queue: * Clean up handling of bad mode switches writing to CPSR, and implement the ARMv8 requirement that they set PSTATE.IL * Implement MDCR_EL3.TPM and MDCR_EL2.TPM traps on perf monitor register accesses * Don't implement stellaris-pl061-only registers on generic-pl061 * Fix SD card handling for raspi * Add missing include files to MAINTAINERS * Mark CNTHP_TVAL_EL2 as ARM_CP_NO_RAW * Make reserved ranges in ID_AA64* spaces RAZ, not UNDEF ---------------------------------------------------------------- Andrew Baumann (3): raspi: fix SD card with recent sdhci changes sdhci: Revert "add optional quirk property to disable card insertion/removal interrupts" sdhci: add quirk property for card insert interrupt status on Raspberry Pi Edgar E. Iglesias (1): target-arm: Mark CNTHP_TVAL_EL2 as ARM_CP_NO_RAW Peter Maydell (14): target-arm: Give CPSR setting on 32-bit exception return its own helper target-arm: Add write_type argument to cpsr_write() target-arm: Raw CPSR writes should skip checks and bank switching linux-user: Use restrictive mask when calling cpsr_write() target-arm: In cpsr_write() ignore mode switches from User mode target-arm: Add comment about not implementing NSACR.RFR target-arm: Add Hyp mode checks to bad_mode_switch() target-arm: Forbid mode switch to Mon from Secure EL1 target-arm: In v8, make illegal AArch32 mode changes set PSTATE.IL target-arm: Make mode switches from Hyp via CPS and MRS illegal target-arm: Make Monitor->NS PL1 mode changes illegal if HCR.TGE is 1 target-arm: Fix handling of SDCR for 32-bit code target-arm: Implement MDCR_EL3.TPM and MDCR_EL2.TPM traps target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEF Thomas Huth (1): MAINTAINERS: Add some missing ARM related header files Wei Huang (1): ARM: PL061: Checking register r/w accesses to reserved area MAINTAINERS | 4 + hw/arm/bcm2835_peripherals.c | 7 ++ hw/arm/bcm2836.c | 7 ++ hw/arm/raspi.c | 16 +++ hw/gpio/pl061.c | 30 ++++-- hw/sd/sdhci.c | 47 ++++++-- include/hw/sd/sdhci.h | 3 +- linux-user/arm/nwfpe/fpa11.h | 2 +- linux-user/main.c | 7 +- linux-user/signal.c | 4 +- target-arm/cpu-qom.h | 1 + target-arm/cpu.h | 17 ++- target-arm/gdbstub.c | 2 +- target-arm/helper.c | 250 +++++++++++++++++++++++++++++++++++++------ target-arm/helper.h | 1 + target-arm/kvm32.c | 2 +- target-arm/kvm64.c | 3 +- target-arm/machine.c | 4 +- target-arm/op_helper.c | 15 ++- target-arm/translate.c | 6 +- 20 files changed, 359 insertions(+), 69 deletions(-)