I truly appreciate your guidance and bringing this matter to my attention. It just seems to me that, in similar case, 16-bit default NaN value should be 0x7E00. This value is needed for MSA operations. ("MIPS Architecture for Programmers Volume IV-j: The MIPS32® SIMD Architecture Module", Revision 1.12, (february 3, 2016), page 52, table 3.7 "Default NaN Encodings")
I plan to include all three corrections in the next version of this patch set. Please, let me know if you think that I should not. Yours, Aleksandar ________________________________________ From: qemu-devel-bounces+aleksandar.markovic=imgtec....@nongnu.org [qemu-devel-bounces+aleksandar.markovic=imgtec....@nongnu.org] on behalf of Leon Alrae Sent: Friday, April 01, 2016 12:02 PM To: Aleksandar Markovic; qemu-devel@nongnu.org Cc: peter.mayd...@linaro.org; ehabk...@redhat.com; pro...@gmail.com; mark.cave-ayl...@ilande.co.uk; ag...@suse.de; kbast...@mail.uni-paderborn.de; Petar Jovanovic; blauwir...@gmail.com; jcmvb...@gmail.com; Miodrag Dinic; qemu-...@nongnu.org; qemu-...@nongnu.org; edgar.igles...@gmail.com; pbonz...@redhat.com; g...@mprc.pku.edu.cn; afaer...@suse.de; aurel...@aurel32.net; r...@twiddle.net Subject: Re: [Qemu-devel] [PATCH 1/2] softfloat: Enable run-time-configurable meaning of signaling NaN bit On 25/03/16 12:50, Aleksandar Markovic wrote: > > /*---------------------------------------------------------------------------- > | The pattern for a default generated single-precision NaN. > > *----------------------------------------------------------------------------*/ > +float32 float32_default_nan(float_status *status) { > #if defined(TARGET_SPARC) > -const float32 float32_default_nan = const_float32(0x7FFFFFFF); > + return const_float32(0x7FFFFFFF); > #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || > \ > defined(TARGET_XTENSA) || defined(TARGET_S390X) || > defined(TARGET_TRICORE) > -const float32 float32_default_nan = const_float32(0x7FC00000); > -#elif SNAN_BIT_IS_ONE > -const float32 float32_default_nan = const_float32(0x7FBFFFFF); > + return const_float32(0x7FC00000); > #else > -const float32 float32_default_nan = const_float32(0xFFC00000); > + if (status->snan_bit_is_one) > + return const_float32(0x7FBFFFFF); > + else > + return const_float32(0xFFC00000); Here for MIPS (when FCR31.NAN2008 is set) we should generate 0x7FC00000 for single-precision. Reference: "MIPS Architecture For Programmers, Volume I-A: Introduction to the MIPS64 Architecture", Imagination Technologies LTD., Document Number: MD00083, Revision 6.01, August 20, 2014, Table 6.3 "Value Supplied When a New Quiet NaN Is Created", p. 84 Also, for double-precision we should generate 0x7FF8000000000000. Thanks, Leon