On 07/04/16 18:53, Sergey Fedorov wrote: > From: Sergey Fedorov <serge.f...@gmail.com> > > Ensure direct jump patching in AArch64 is atomic by using > atomic_read()/atomic_set() for code patching. > > Signed-off-by: Sergey Fedorov <serge.f...@gmail.com> > Signed-off-by: Sergey Fedorov <sergey.fedo...@linaro.org> > --- > tcg/aarch64/tcg-target.inc.c | 14 +++++++++++++- > 1 file changed, 13 insertions(+), 1 deletion(-) > > diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c > index 0ed10a974121..15fdebec921f 100644 > --- a/tcg/aarch64/tcg-target.inc.c > +++ b/tcg/aarch64/tcg-target.inc.c > @@ -73,6 +73,18 @@ static inline void reloc_pc26(tcg_insn_unit *code_ptr, > tcg_insn_unit *target) > *code_ptr = deposit32(*code_ptr, 0, 26, offset); > } > > +static inline void reloc_pc26_atomic(tcg_insn_unit *code_ptr, > + tcg_insn_unit *target) > +{ > + ptrdiff_t offset = target - code_ptr; > + tcg_insn_unit insn; > + assert(offset == sextract64(offset, 0, 26));
I'd better use tcg_debug_assert() here as in this patch: http://patchwork.ozlabs.org/patch/613020/ Kind regards, Sergey > + /* read instruction, mask away previous PC_REL26 parameter contents, > + set the proper offset, then write back the instruction. */ > + insn = atomic_read(code_ptr); > + atomic_set(code_ptr, deposit32(insn, 0, 26, offset)); > +} > + > static inline void reloc_pc19(tcg_insn_unit *code_ptr, tcg_insn_unit *target) > { > ptrdiff_t offset = target - code_ptr; > @@ -835,7 +847,7 @@ void aarch64_tb_set_jmp_target(uintptr_t jmp_addr, > uintptr_t addr) > tcg_insn_unit *code_ptr = (tcg_insn_unit *)jmp_addr; > tcg_insn_unit *target = (tcg_insn_unit *)addr; > > - reloc_pc26(code_ptr, target); > + reloc_pc26_atomic(code_ptr, target); > flush_icache_range(jmp_addr, jmp_addr + 4); > } >